Charge Stabilization Layer for High Voltage Semiconductor Devices
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Solution Overview
Problem
High voltage semiconductor devices face challenges in achieving stable and reliable performance due to conflicting design parameters of high blocking voltage and low on-resistance, leading to breakdown voltage degradation and parasitic leakage effects, especially when using materials and methods suited for lower voltage devices.
Innovation Solution
The introduction of a charge stabilization layer with a lower dielectric constant, such as a silicon glass material with increased SiH content, is used to neutralize surface charge and reduce dipole effects at the dielectric interface, improving the stability of high voltage semiconductor devices under reverse bias conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If high resistivity starting materials and regions are used to achieve high blocking voltage, then breakdown voltage capability is improved, but device stability and reliability deteriorate over time due to breakdown voltage degradation and parasitic leakage effects
Solution Approach 1:
A charge stabilization layer comprising silicon glass material with a dielectric constant of less than 3.9 is introduced as an intermediary between the high resistivity n-region and the metal contact. This intermediate layer neutralizes surface charge and reduces dipole effects at the dielectric interface, preventing breakdown voltage degradation and parasitic leakage effects while maintaining high blocking voltage capability.
Solution Approach 2:
The patent changes the dielectric constant parameter of the field stabilization material to less than 3.9 (lower than conventional silicon dioxide), and adjusts the silicon glass material composition with increased SiH content. These parameter changes enable effective neutralization of surface charge and reduction of dipole effects, resolving the reliability issue while preserving strength.
2Ease of manufacture
If conventional materials and methods suited for lower voltage devices are used, then manufacturing ease is improved, but device performance deteriorates with breakdown voltage degradation and unwanted field inversion effects
Solution Approach 1:
The field stabilization layer uses silicon glass material with a dielectric constant of less than 3.9 and increased SiH content, differing from conventional materials. This parameter change enables the material to function effectively at high voltage while remaining compatible with standard semiconductor manufacturing processes, achieving both ease of manufacture and reliability.
3Strength
If high resistivity values are used in starting materials, then high voltage blocking capability is improved, but manufacturing precision becomes more difficult due to evolving design constraints and smaller device dimensions
Solution Approach 1:
The charge stabilization layer acts as an intermediary that compensates for manufacturing variations in high resistivity materials. By neutralizing surface charge and reducing dipole effects, it provides a stable interface that maintains high voltage blocking capability even when manufacturing precision varies due to smaller device dimensions and multiple metallization levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly enhances the breakdown voltage stability of high voltage semiconductor devices by up to 85% during high voltage stress testing, addressing the limitations of conventional materials and methods used in lower voltage devices.
Implementation Method 1
The introduction of a charge stabilization layer with a lower dielectric constant, such as a silicon glass material with increased SiH content, is used to neutralize surface charge and reduce dipole effects at the dielectric interface
Data Source
AI summary
In one embodiment, a high voltage semiconductor device is formed with a first dielectric layer and a charge stabilization layer comprising a flowable glass formed over the first dielectric layer.


