Charge Storage Patterns for Non-Volatile Memory Isolation
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Solution Overview
Problem
Conventional charge trap non-volatile memory devices face challenges in inter-device isolation, limited active region, and data retention characteristics, particularly when cell density is increased, leading to charge transfer between adjacent cells.
Innovation Solution
The semiconductor device features active regions protruding above a device isolation layer with tunnel insulating layers on both surfaces and charge storage patterns separated by a blocking insulating layer, preventing charge transfer between cells, and a gate electrode is formed on the blocking insulating layer to enhance data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between adjacent cells is reduced to improve integration, then device density increases, but charge transfer between adjacent cells occurs leading to data retention problems
Solution Approach 1:
The charge storage layer is divided into separate charge storage patterns for adjacent cells, with isolation regions positioned between them. This segmentation prevents charge transfer between cells while maintaining high integration density, as each cell's charge storage region is electrically isolated from its neighbors.
Solution Approach 2:
An isolation region is introduced as an intermediary structure between adjacent charge storage patterns. This isolation region acts as a barrier that prevents charge transfer between cells, enabling reliable data retention even when cells are closely spaced for high integration.
2Reliability
If conventional trench isolation is used to isolate adjacent cells, then charge transfer is prevented, but the active region area is limited and integration density is reduced
Solution Approach 1:
The isolation structure is moved from a vertical trench configuration to a horizontal planar configuration. The isolation region is positioned between charge storage patterns in the same plane, allowing the active region to extend vertically without being constrained by deep trench isolation, thereby increasing active region area while maintaining isolation.
Solution Approach 2:
The isolation function is segmented from the traditional trench structure and integrated directly into the charge storage layer formation process. Isolation regions are formed between charge storage patterns, eliminating the need for separate trench isolation structures and maximizing active region utilization.
3Ease of manufacture
If charge storage patterns are formed without separation, then manufacturing process is simplified, but charge transfer between adjacent cells occurs
Solution Approach 1:
Charge storage patterns are formed with built-in isolation regions between adjacent cells using a single patterning process. The isolation regions are integrated into the charge storage layer itself, maintaining manufacturing simplicity while ensuring electrical isolation between cells to prevent charge transfer.
Data Source
AI summary
A semiconductor device (e.g., a non-volatile memory device) with improved data retention characteristics includes active regions that protrude above a top surface of a device isolation region. A tunneling insulating layer is formed on the active regions. Charge storage patterns (e.g., charge trap patterns) are formed so as to be spaced apart from each other. A blocking insulating layer and a gate are formed on the charge storage patterns.