Charge Transfer Device for Multi-Level Memory Sensing
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Solution Overview
Problem
Current memory devices face challenges in accurately sensing multi-level memory cells, which store more than two states, due to limitations in read/write speeds, reliability, and data retention, especially in distinguishing between multiple logic states.
Innovation Solution
The use of a charge transfer device that couples a digit line with one or more sense components to transfer and sense charges, allowing for improved differentiation between logic states by varying the timing and reference voltages applied during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional sensing techniques are used for multi-level memory cells, then the memory device can operate with standard read/write speeds, but the accuracy in distinguishing between multiple logic states deteriorates
Solution Approach 1:
The sensing operation is divided into multiple sequential phases: a first sensing phase that samples the memory cell state, followed by a second sensing phase that takes another sample. This segmentation allows the system to collect multiple measurements and determine the logic state based on the combination of samples, thereby improving sensing accuracy for multi-level memory cells while maintaining reliable data retention
Solution Approach 2:
Before the final logic state determination, the system performs preliminary sensing operations including the first and second sampling phases. These preliminary actions allow the memory device to evaluate intermediate states and apply appropriate sensing techniques (such as normal or inverted sensing) based on the sampled values, ensuring accurate distinction between multiple logic states before committing to a final state determination
2Productivity
If the sensing window is narrowed to improve read speed, then read/write speed increases, but the ability to accurately sense multi-level memory cells deteriorates
Solution Approach 1:
The sensing technique dynamically adjusts its approach based on sampled values from multiple phases. The system can switch between normal sensing and inverted sensing techniques depending on the intermediate results, allowing flexible adaptation to different memory cell states. This dynamic approach enables accurate multi-level sensing without requiring an excessively wide sensing window, thus maintaining较好的 read/write speed while improving sensing accuracy
3Measurement precision
If multiple sensing phases are implemented to improve logic state determination, then sensing accuracy improves, but device complexity increases
Solution Approach 1:
The sensing system uses the memory cell's own stored state to guide the sensing process. The first and second sampling phases capture information about the memory cell state, and this information is used to determine the appropriate final sensing technique. The system essentially serves itself by using intermediate measurements to control the final measurement approach, improving accuracy without requiring external complex control mechanisms
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of sensing multi-level memory cells by augmenting the signal window, enabling more precise determination of logic states and improving overall memory cell reliability and data retention.
Implementation Method 1
a charge transfer device may be used to transfer the charge between the digit line and one or more sense components
Implementation Method 2
when a voltage of the digit line (e.g., due to the multi-level memory cell being discharged onto the digit line) is less than a voltage of a gate of the charge transfer device
Data Source
AI summary
Techniques are provided for sensing a signal associated with a memory cell capable of storing three or more logic states. To sense the memory cell (e.g., a signal associated with the memory cell), a charge may be transferred between a digit line and a node coupled with a plurality of sense components using a charge transfer device. Once the charge is transferred, at least some if not each of the plurality of sense components may sense the charge using one of a variety of sensing schemes. For example, the charge may be sensed by each sense component at a same time using a single fixed reference value, or at different times using different fixed reference values. Based on the charge being transferred or transferred with the node (e.g., using the charge transfer device) and each sense component sensing the charge, a logic state associated with the memory cell may be determined.