Charge-Transfer Image Sensor Double Gate Implantation
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Solution Overview
Problem
Existing CMOS image sensor technologies face challenges in producing linear scrolling sensors with charge integration due to complexity and control signal complexity, making it difficult to achieve efficient charge transfer and summation.
Innovation Solution
A charge transfer image sensor with N adjacent lines of pixels, utilizing a single polycrystalline silicon gate level with unique doping configurations for directional charge transfer, where the polysilicon gate has p-type conductivity on one side and n-type conductivity on the other, brought to the same potential, allowing for efficient charge transfer between pixels using only two control phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single polycrystalline silicon gate level is used with unique doping configuration, then manufacturing complexity is reduced, but achieving directional charge transfer becomes difficult
Solution Approach 1:
The gate is divided into two regions with different doping types (p-type and n-type) along its length. This local differentiation creates asymmetric potential barriers that enable directional charge transfer despite using a single gate level, resolving the contradiction between manufacturing simplicity and functional capability
Solution Approach 2:
By implementing asymmetric doping profiles in the gate regions, the patent creates unequal potential barriers that prevent charge backflow. This asymmetry allows directional charge transfer to be achieved without requiring multiple gate levels or complex control signals, thus maintaining manufacturing simplicity while enabling the required functionality
2Productivity
If conventional CCD technology with overlapping polycrystalline silicon gates is used, then charge transfer efficiency is improved, but power consumption and supply voltage requirements increase
Solution Approach 1:
The patent extracts the essential function of charge transfer from the complex multi-gate CCD structure and implements it using a simplified single-gate architecture with differential doping. This removes the need for high supply voltages and complex overlapping gate structures while maintaining effective charge transfer, thus reducing power consumption
Solution Approach 2:
The patent changes the doping parameters of the gate (introducing p-type and n-type regions) to create the necessary potential barriers for charge transfer. This parameter modification allows the system to achieve efficient charge transfer at lower voltages compared to conventional CCD technology, thereby reducing power consumption
3Ease of manufacture
If CMOS active pixel sensors with switched capacitors are used for charge integration, then manufacturing simplicity is improved, but charge transfer losses and noise increase
Solution Approach 1:
The patent replaces the switched capacitor mechanism (electrical system) with a field-based charge transfer mechanism using doped gate regions. This substitution eliminates the need for complex switching operations and charge redistribution through capacitors, thereby reducing transfer losses and noise while maintaining manufacturing simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution simplifies the manufacturing process and ensures directional charge transfer over the entire column without increased complexity, enabling effective scrolling and integration of charges while reducing noise and power consumption.
Implementation Method 1
the gate has two types of doping which are a first type of p-type conductivity on a part of the width LG, on the side where the gate is adjacent to the photodiode of the pixel and a second type of n-type conductivity on another part of the width LG
Implementation Method 2
adjacent pixels of a column each comprising a photodiode of width LP diffused in an active semiconductor layer
Data Source
Figure 1~3
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Figure 6~6D
AI summary
The invention relates to TDI image sensors. In order to ensure the directionality of the charge transfer in columns from pixel to pixel, it is provided for the adjacent pixels of one column to each include a photodiode (ΡΗi) having a width LP, and a storage gate (Gi) having a width LG and being made of doped polycrystalline silicon, adjacent to the photodiode of the pixel and adjacent to the photodiode (PHi+1) of a subsequent pixel of the column. The configuration of the doping of the active layer is unique over the entire width LP of the photodiode; the configuration of the doping of the active layer is unique over the entire width LG of the gate, and the polycrystalline silicon gate comprises two types of doping which are p++ doping over a portion of the width LG, on the side on which the gate is adjacent to the photodiode of the pixel and n++ doping on another portion of the width LG, on the side adjacent to the photodiode of the subsequent pixel. This gate doping difference activates a potential step in the active layer which ensures the directionality of the transfer.