Charge-Trapping Isolation Structure for Image Sensor Leakage Control

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Solution Overview

Problem

In the integrated circuit industry, high integration of semiconductor devices leads to issues with improper electrical isolation, causing current leakage, latch-up, noise margin degradation, voltage shift, and cross-talk, particularly due to the need for ion implantation and doped regions in sensor array regions, which can damage substrates and increase electron leakage.

Innovation Solution

A method for forming an isolation structure that replaces the doped region with a charge-trapping layer, eliminating the need for ion implantation and photolithography, and reduces the requirement for a protecting mask, thereby mitigating substrate damage and electron leakage by using a trench formation process with a first insulating layer, a charge-trapping layer, and a second insulating layer to provide effective electrical isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ion implantation and doped regions are used for electrical isolation in sensor array regions, then electrical isolation between devices is achieved, but substrate damage and electron leakage increase

Engineering Contradiction:
Improveelectrical isolationVSAvoidsubstrate damage and electron leakage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts and removes the harmful ion implantation process from the isolation structure formation. Instead of using ion implantation to create doped regions, the invention uses a purely dielectric filling approach where trenches are formed and filled with insulating materials, completely eliminating the substrate damage and electron leakage caused by ion implantation while maintaining electrical isolation functionality

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs a simple, disposable trench filling approach using conventional dielectric materials that can be deposited and planarized without requiring complex ion implantation equipment. The isolation structure is formed by creating trenches and filling them with insulating material, eliminating the need for expensive and harmful ion implantation processes while achieving the same electrical isolation effect

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Reliability

If ion implantation and photolithography processes are used to form doped regions, then electrical isolation is achieved, but manufacturing complexity and process steps increase

Engineering Contradiction:
Improveelectrical isolationVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the isolation structure formation with standard trench formation and filling processes already present in semiconductor manufacturing. By combining trench etching, dielectric deposition, and chemical mechanical polishing into a unified flow, the invention eliminates the need for separate ion implantation and photolithography steps, reducing manufacturing complexity while maintaining electrical isolation

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal isolation structure that can be applied across different semiconductor device types and manufacturing processes. The trench-based dielectric filling approach is a multi-functional solution that provides electrical isolation without requiring device-specific ion implantation parameters or additional photolithography masks, making it universally applicable and simplifying the overall manufacturing process

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces electron leakage and substrate damage, improving the isolation between semiconductor devices and enhancing the reliability of semiconductor structures by minimizing defects and leakage issues, while also simplifying the manufacturing process by eliminating the need for ion implantation and photolithography.

Implementation Method 1

a charge-trapping layer disposed between the first oxide layer and the second oxide layer

Methodology Applied
Scientific EffectCharge trapping:

Data Source

PatentUS11848339B2Semiconductor structure including isolation structure and method for forming isolation structure
Publication Date: 2023.12.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11848339B2 patent drawing
  • US11848339B2 patent drawing
  • US11848339B2 patent drawing

AI summary

A semiconductor structure includes a semiconductor substrate, an image sensor, and an isolation structure. The isolation structure is adjacent to the image sensor and disposed in the semiconductor substrate. The isolation structure includes a first oxide layer, a second oxide layer over the first oxide layer, and a charge-trapping layer disposed between the first oxide layer and the second oxide layer. The charge-trapping layer includes a material different from those of the first oxide layer and the second oxide layer.