Chip Characterization via Boundary Voltage Oscillator Measurement

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Solution Overview

Problem

The challenge in post-silicon validation is the inability to properly analyze chip performance due to blocked critical paths by stacked components and packaging materials, making comprehensive reliability testing difficult.

Innovation Solution

A method involving a test device that outputs varying operating voltages and system clock signals to chips with oscillator circuits, recording oscillating signals at failure states to measure chip characteristics without damaging the package or semiconductor structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional post-silicon validation methods are used to test chip performance, then the critical path can be analyzed, but the stacked components and packaging materials block the measurement, making comprehensive reliability testing impossible

Engineering Contradiction:
Improvechip reliability testingVSAvoidchip characteristic measurement
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent introduces an intermediary measurement approach by using observable chip behaviors (output signals, power consumption, temperature) as mediators to indirectly infer critical path characteristics. Instead of directly measuring the blocked critical path, the system uses these intermediary indicators that can be measured through the packaging materials to evaluate chip performance and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces direct physical measurement of the critical path (which is blocked by packaging) with electrical and thermal measurements. By substituting mechanical/direct optical measurement with electrical signal analysis and power/temperature monitoring, the system can evaluate chip characteristics without physically accessing the blocked critical path.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If direct measurement methods are used to analyze chip critical path, then performance can be evaluated, but the packaging materials and stacked components prevent proper analysis

Engineering Contradiction:
Improvechip performance analysisVSAvoidpackaging material interference
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful effect of packaging materials (which block direct measurement) into a beneficial measurement opportunity. By measuring power consumption and temperature through the same packaging materials, the system turns the blocking structure into a transmission medium for thermal and electrical signals, enabling indirect but accurate characterization of critical path performance.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the measurement parameters from direct signal timing (blocked by packaging) to power consumption and temperature characteristics that can penetrate the packaging. By transitioning to different physical parameters that are not blocked by the packaging materials, the system achieves precise measurement of chip performance under various operating conditions.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12510589B2Method of measuring chip characteristics, test device and non-transitory computer readable media
Publication Date: 2025.12.30 GLOBAL UNICHIP CORPORATION
  • US12510589B2 patent drawing
  • US12510589B2 patent drawing
  • US12510589B2 patent drawing

AI summary

A method of measuring chip characteristics includes: outputting an operating voltage to a chip by a test device, wherein the chip comprises a plurality of oscillator circuits configured to generate a plurality of oscillating signals according to the operating voltage; and testing the chip by the test device under a situation that the test device outputs a system clock signal having a first clock period to the chip, including: changing the operating voltage sequentially with the test device until the chip changes from a normal state to a failure state, so as to generate a boundary operating voltage; and recording the plurality of oscillating signals generated according to the boundary operating voltage as measurement data by the test device, wherein the measurement data represents chip characteristics of the chip corresponding to the first clock period.