Chip Bump Manufacturing via Conductive Layer Leveling
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Solution Overview
Problem
The existing methods for manufacturing chip size packages are complex and costly due to the need for leveling and polishing processes to correct bump height variations and form conductive layers, which increase manufacturing costs and complexity.
Innovation Solution
A method involving forming a bump with a projection on an electrode pad, covering it with an insulating layer, exposing the projection, forming a conductive layer on the insulating layer and projection, removing the protruded conductive layer portion, and using electrolytic plating to create a conductive pattern connected to the bump, eliminating the need for leveling and polishing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bonding wire is used to form bumps, then the bumps can be formed on electrode pads, but the bumps have height variations making it hard to form rewiring connections
Solution Approach 1:
The patent applies preliminary action by forming a conductive layer over the bumps before rewiring formation, and then performing leveling processing to flatten the conductive layer surface. This preliminary conductive layer formation and leveling eliminates the need to achieve precise bump height uniformity, as the leveling step corrects the height variations beforehand.
Solution Approach 2:
The conductive layer serves as an intermediary between the bumps and the rewiring. Instead of directly connecting to the bumps with height variations, the rewiring connects to the conductive layer that has been leveled, thus mediating the height variation problem.
2Manufacturing precision
If leveling processing is applied to flatten bumps, then uniform height is achieved, but the manufacturing process becomes complicated
Solution Approach 1:
The patent replaces direct mechanical leveling of bumps with a different approach: forming a conductive layer over the bumps and then leveling the conductive layer surface. This substitution makes the leveling process more manageable and integrates it better with subsequent plating and rewiring formation steps.
3Reliability
If insulating layer is formed to cover bumps, then protection is provided, but polishing step is required to expose bumps increasing process complexity
Solution Approach 1:
Instead of forming the insulating layer and then polishing to expose the bumps, the patent inverts the sequence by first forming the conductive layer over the bumps, performing the leveling processing, and then forming the insulating layer. This inversion eliminates the need for subsequent polishing steps to expose bumps, as the critical operations are completed before insulating layer formation.
4Ease of manufacture
If nonelectrolytic plating method is used after polishing, then conductive layer can be formed, but desmear processing is required increasing cost and complexity
Solution Approach 1:
The patent performs preliminary leveling processing on the conductive layer surface before forming the insulating layer and subsequent rewiring. This preliminary surface flattening eliminates the need for desmear processing later, as the surface is already properly prepared for electrolytic plating of the rewiring.
5Ease of manufacture
If sputtering or CVD method is used to form conductive layer, then conductive layer can be formed, but expensive vacuum apparatus is required increasing manufacturing cost
Solution Approach 1:
The patent employs electrolytic plating, a cost-effective and widely available technique, to form the conductive layer instead of using expensive vacuum-based sputtering or CVD methods. This substitution with a cheaper, more accessible process reduces manufacturing costs while achieving the same functional result.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This simplifies the manufacturing process, reduces costs, and ensures uniform projection heights, allowing for direct formation of conductive patterns without additional processing steps.
Implementation Method 1
The bump is formed by a bonding wire using a bonding device. For a specific forming procedure, in the bonding device, a bonding wire extended from a capillary is first bonded to an electrode pad
Implementation Method 2
forming a wiring layer through electrolytic plating using the conductive layer as a feeding layer
Data Source
AI summary
A method includes a step of forming a bump 104 having a projection 104B on an electrode pad 103 provided on a semiconductor chip 101, a step of exposing a part of the projection 104B to an upper surface of an insulating layer 105 formed on the semiconductor chip 101, a step of forming a conductive layer 107A on the upper surface of the insulating layer 105 and an exposed part of a tip portion 104D, a step of removing a protruded portion of the conductive layer 107A which is opposed to the tip portion 104D by means of a grinding roll 112, thereby exposing the projection from the conductive layer 107A, and a step of forming a conductive layer 108A through electrolytic plating using the conductive layer 107A as a feeding layer and patterning the conductive layer 108A.