Photolithographic Chip Coating for Fragile Inter-Chip Structures
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Solution Overview
Problem
Existing chip coating methods are unsuitable for temperature-sensitive chips like organic light-emitting diodes, as they require high-temperature processing that can cause detachment and damage, and mechanical abrasion weakens fragile chips, while failing to maintain the coating exclusively at inter-chip spaces without degrading the front faces.
Innovation Solution
A method involving the formation of a photosensitive coating film using a photolithographic sequence with ultraviolet radiation to selectively remove the coating film, keeping it only at inter-chip spaces and avoiding mechanical abrasion, allowing for reduced thermal budgets and preserving chip integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-temperature processing is used to form the coating film, then the coating film can be properly formed, but temperature-sensitive chips like organic light-emitting diodes are damaged or detached
Solution Approach 1:
The patent changes the processing temperature parameter from high-temperature (150-200°C) to low-temperature (below glass transition temperature of the polymer matrix) to accommodate temperature-sensitive chips while still achieving proper coating film formation through extended drying time
Solution Approach 2:
The patent applies a release agent to the support substrate before forming the coating film, creating a preliminary protective layer that prevents direct adhesion between the coating film and substrate, thereby preventing chip detachment during subsequent processing
2Manufacturing precision
If mechanical abrasion is used to thin and planarize the coating film, then the front face of chips can be uncovered, but the mechanical integrity of fragile chips is weakened or compromised
Solution Approach 1:
The patent replaces the mechanical abrasion system with a chemical etching system using a patterned mask. The mask defines the inter-chip spaces, and chemical etching selectively removes coating material from these spaces without mechanically contacting or damaging the chip front faces
Solution Approach 2:
The patent introduces a patterned mask as an intermediary element that selectively protects chip front faces during the coating thinning process. The mask allows coating removal only in inter-chip spaces while preventing contact with chip surfaces, thereby achieving surface planarity without mechanical damage
3Reliability
If silica beads are added to the coating film to reduce thermal expansion constraints, then chip detachment is prevented, but the inter-chip space cannot be reduced below 500 μm
Solution Approach 1:
The patent extracts the silica beads from the coating film formulation, using only the polymer matrix without particulate fillers. This removal of beads enables the coating to be applied in thinner layers and allows inter-chip spaces to be reduced below the 500 μm limit imposed by bead diameter
4Ease of manufacture
If the coating film is kept exclusively at inter-chip spaces and recessed from chip front faces, then subsequent micro-fabrication can be performed, but mechanical abrasion degrades the chip front faces
Solution Approach 1:
The patent replaces mechanical abrasion with chemical etching using a patterned mask. This substitution achieves the same goal of exposing chip contact areas and creating recessed coating at inter-chip spaces without the mechanical contact that degrades chip front faces
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively uncovers the front faces of chips while maintaining the coating exclusively at inter-chip spaces, reducing thermal stress and mechanical damage, and enabling the use of temperature-sensitive materials with reduced inter-chip space dimensions.
Implementation Method 1
a first photolithographic sequence which comprises an insolation sub-step b1), and a dissolution sub-step b2)
Data Source
AI summary
A method for coating chips resting, by a rear face opposite to a front face, on a main face of a support substrate, and separated from each other by an inter-chip space, includes a step of forming a photosensitive coating film covering the front faces and the inter-chip spaces. The method further includes a first photolithographic sequence which comprises an insolation sub-step, and a dissolution sub-step. The sequence leads to a partial removal of the photosensitive coating film so as to maintain the film exclusively at the inter-chip spaces and, advantageously recessed relative to the front faces.