Collective Curving of Electronic Chips With Coplanar Backside Contacts
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Solution Overview
Problem
Existing methods for curving electronic chips are unsatisfactory as they do not allow for easy production of electrical contacts on the backside of the substrate after curvature and cannot achieve simultaneous curvature of multiple singulated chips.
Innovation Solution
A process involving joining diced electronic chips to a carrier substrate, forming a redistribution layer with metal tracks and pillars, and applying a material with a higher thermal expansion coefficient to create thermomechanical stresses that curve the chips while keeping the material around the pillars coplanar, enabling easy electrical contact and simultaneous curvature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If a transparent cover with different thermal expansion coefficient is used to curve electronic chips, then the chip curvature is achieved, but electrical contacts on the backside cannot be easily produced and only single chip curvature is possible
Solution Approach 1:
The material is segmented into first segments attached to chip layers and second segments attached to carrier substrate, allowing differential movement and curvature while maintaining coplanar electrical contact regions
Solution Approach 2:
The formed material acts as an intermediary layer between the electronic chip and carrier substrate, mediating the curvature through thermomechanical stress while preserving electrical contact capability through coplanar second segments
2Shape
If traditional curving methods are used, then single chip curvature is possible, but simultaneous curvature of multiple chips cannot be achieved
Solution Approach 1:
Multiple singulated electronic chips are joined together on a common carrier substrate and curved simultaneously through a single heat treatment process, merging multiple curvature operations into one unified process
Solution Approach 2:
The carrier substrate serves multiple functions: supporting multiple chips, providing a common reference plane, and enabling simultaneous thermomechanical curving of all attached chips through uniform heating
3Shape
If material with higher thermal expansion coefficient is applied to create thermomechanical stresses, then chip curvature with preset shape is achieved, but the material structure becomes complex
Solution Approach 1:
The material exhibits different local properties: first segments are attached to chip layers to induce curvature, while second segments remain coplanar with the carrier substrate to maintain electrical contact functionality
Solution Approach 2:
The formed material creates a composite structure combining the electronic chip stack, the thermally-expansive material layer, and the carrier substrate, where differential thermal expansion generates controlled thermomechanical stresses for curvature
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process allows for simultaneous curvature of multiple electronic chips and facilitates the easy production of electrical contacts, addressing the limitations of existing methods by utilizing thermomechanical stresses to achieve a preset convex shape.
Implementation Method 1
the material possessing a formation temperature; applying a heat treatment at the formation temperature of the material, the formed material possessing a second thickness, and a second coefficient of thermal expansion strictly higher than the first coefficient of thermal expansion
Implementation Method 2
the ratio between the first and second coefficients of thermal expansion, the ratio between the first and second thicknesses and the formation temperature being adapted so that, at the end of step f), the stack of each electronic chip is curved with a preset convex shape
Data Source
AI summary
A process includes providing electronic chips, the chips having been diced beforehand and each including a stack including a matrix-array of pixels, an interconnect layer, first layer, joining the electronic chips to a carrier substrate, so as to leave a spacing region between the chips; forming a redistribution layer having lateral ends extending into each spacing region; forming metal pillars on the lateral ends; moulding a material including first segments, facing the first layers, second segments which are separate from the first segments, and which extend around the metal pillars; the first and second segments being coplanar; applying a heat treatment, the formed material being chosen so that the stack is curved with a convex shape; the second segments remaining coplanar at the end.


