Chip Debug Function Using Port Sharing and Signal Selection
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Solution Overview
Problem
The increasing number of circuits in chips often exceeds the number of output ports available for debug signal output, making chip testing more difficult due to insufficient ports for reading debug signals from multiple circuits.
Innovation Solution
A chip design incorporating functional circuitries, a selector circuitry, a data reconstruction circuitry, and a switching circuitry that allows selective output of debug signals using address signals, split signals, and switching signals to share output ports with normal signals, enabling debug data output without additional ports.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of output ports is increased to output debug signals from more circuits, then the number of readable debug signals increases, but the device complexity and manufacturing cost increase
Solution Approach 1:
The output ports are designed to serve dual functions: normal signal output during regular operation and debug signal output during testing modes. The switching circuitry enables the same physical ports to be dynamically allocated between these two functions based on operational mode, eliminating the need for separate dedicated debug ports.
Solution Approach 2:
The system dynamically reconfigures the output ports between normal operation mode and debug mode through switching circuitry controlled by mode signals. This dynamic allocation allows the fixed number of physical ports to adaptively serve different purposes, maximizing their utility without requiring additional hardware.
2Reliability
If the number of output ports is increased to output debug signals from more circuits, then chip testing capability improves, but manufacturing cost increases
Solution Approach 1:
The output ports perform multiple roles by switching between normal signal transmission and debug signal output. This multi-functionality eliminates the need for additional dedicated debug ports, reducing the total component count and associated manufacturing costs while maintaining comprehensive testing capability.
Solution Approach 2:
The debug output functionality is merged with the normal output ports rather than being implemented as separate hardware. The switching circuitry combines the control logic for mode selection with the existing output infrastructure, creating an integrated solution that reduces manufacturing complexity and cost.
3Productivity
If debug signals from multiple circuits are output simultaneously through limited ports, then testing efficiency improves, but signal interference and loss of information occur
Solution Approach 1:
The system performs preliminary selection of which debug signals to output based on predetermined addressing schemes and signal priority rules. The selector circuitry pre-configures the mapping between circuits and output ports before actual debugging operations, ensuring that critical signals are allocated appropriately and preventing information loss through systematic signal management.
Solution Approach 2:
The debug signal output is segmented into multiple channels or time slots, with different circuits assigned to different output ports or time periods. This segmentation prevents signal interference by isolating multiple debug signals into separate transmission paths while maintaining the ability to access all necessary debugging information.
Data Source
AI summary
A chip having a debug function includes functional circuitries, a selector circuitry, a data reconstruction circuitry, and a switching circuitry. Each functional circuitry includes a decoder circuit that stores a corresponding set of debug signals and outputs a corresponding debug signal in the corresponding set of debug signals to be a corresponding signal in first signals according to a corresponding address signal in address signals. The selector circuitry selects second signals from the first signals according to the address signals. The data reconstruction circuitry selects first data from the second signals according to split signals and outputs the same to be debug data. Each first data is partial data of a corresponding signal in the second signals. The switching circuitry determines whether to output the debug data or at least one output signal associated with the functional circuitries via output ports according to switching signals.