Functional Testing TRIZ Cases
- Automated Self-Check for Closed Loop Emulation Replay
A filtering system reduces search space size by eliminating don't care signals during closed loop emulation replay.
- Hardware Software Communication Channel for FPGA Post-Silicon Validation
A hardware software communication channel translates DPI interfaces into FIFO mechanisms for FPGA platforms.
- Variable Period Clock Signal for Hardware Verification
A hardware verification system generates a variable period clock signal to adapt emulation speed.
- Global Debug Controller Tag RAM Trace Filtering
Tag RAM filters trace data via address masks, reducing volume and improving debugging efficiency.
- HLII Silicon Interposer Interface for Chiplet Data Transmission
A high-speed low-latency interconnect interface manages silicon interposer signals through dedicated physical and link layers.
- Display Device Screen Mirroring History Tracking
A display device tracks screen mirroring history to enable content selection from previous sessions.
- Processor Repair via Delay Stage Switching for Fixed Transmission Time
Switching delay stages compensates for defective processing circuits to maintain fixed transmission time and chip yield.
- March Test Automation via Fault Periodicity
A memory test circuit generates March tests using a fault periodic table to automate detection sequences.
- Memory Interface Selectable Evaluation Modes
A memory controller circuit generates output patterns through a test interface to enable AC characterization of electrical and timing specifications.