Semiconductor Chip Identifier Allocation Post-Stacking

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Solution Overview

Problem

Existing semiconductor device technologies face inefficiencies and increased costs due to the need for dedicated lines and complex identifier allocation methods when stacking semiconductor chips, which require pre-allocation of unique chip identifiers before stacking and involve understanding signal delays for identifier allocation.

Innovation Solution

A semiconductor device with a first transmission unit for requesting and a first reception unit for receiving chip identifier setting states, allowing for the setting of unique chip identifiers after stacking through shared signal lines using a multiplexer and demultiplexer system, enabling simultaneous identifier confirmation and data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If chip identifiers are allocated before stacking semiconductor chips, then unique identifiers can be assigned to each chip, but it becomes necessary to identify individual chips during stacking which decreases efficiency and increases cost

Engineering Contradiction:
Improvechip identifier allocationVSAvoidstacking efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by allocating chip identifiers after stacking rather than before, which eliminates the need to identify individual chips during the stacking process. This reverses the conventional sequence of operations to improve productivity while maintaining reliable identifier allocation.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If dedicated lines are used to allocate chip identifiers after stacking, then unique identifiers can be assigned post-stacking, but the number of interconnections increases

Engineering Contradiction:
Improvepost-stacking identifier allocationVSAvoidnumber of interconnections
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent applies universality by enabling the data transfer lines to serve dual purposes: both transferring data between chips and allocating chip identifiers after stacking. This eliminates the need for dedicated identifier allocation lines, reducing device complexity while maintaining ease of manufacture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functions of data transfer and identifier allocation into a single communication channel. By combining these functions, the patent reduces the number of interconnections required while maintaining both data transfer capability and identifier allocation functionality.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If instruction delay methods are used to allocate chip identifiers, then identifiers can be assigned during normal operation, but it is necessary to grasp the delay amount of instructions which increases complexity

Engineering Contradiction:
Improveidentifier allocation timingVSAvoiddelay measurement requirement
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies self-service by enabling semiconductor chips to automatically determine their own chip identifiers through the propagation of allocation instructions through the stack. Each chip receives the instruction at a different time based on its position, allowing automatic identifier assignment without requiring external measurement or control of delay amounts.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9536121B2Semiconductor device and chip identifier setting method
Publication Date: 2017.01.03 CANON KK
  • US9536121B2 patent drawing
  • US9536121B2 patent drawing
  • US9536121B2 patent drawing

AI summary

A semiconductor chip transmits a request signal which requests notification of the setting state of a chip identifier to another semiconductor chip connected to one of the upstream and downstream, receives a response signal indicating the setting state of the chip identifier and the value of the chip identifier, as a response to the request signal, and performs a chip identifier setting process based on the response signal. When receiving a request signal from another semiconductor chip connected to the other of the upstream and downstream, the semiconductor chip transmits a response signal indicating the setting state of the chip identifier and the value of the chip identifier, as a response to the request signal.