Semiconductor Chip Interconnect Structure for Reduced Wiring Area
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Solution Overview
Problem
Conventional power semiconductor modules experience an increase in wiring area when multiple semiconductor chips are mounted on the circuit pattern of the insulated circuit substrate, leading to increased chip size and cost.
Innovation Solution
A semiconductor device configuration that integrates a conductive member, resin member, and external terminal through integral molding, reducing wiring area by using an integrated structure body with a conductive member and resin member to connect semiconductor chips, and incorporating a resin member with engagement parts and roughened surfaces for improved adhesion and insulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large number of semiconductor chips are mounted on insulated circuit substrates using conventional lead frames and bonding wires, then the electrical connection between chips is achieved, but the wiring area increases leading to larger chip sizes and higher costs
Solution Approach 1:
The patent merges the lead frame and bonding wire functions into a single integrated conductive member structure. The conductive member directly connects multiple semiconductor chips without requiring separate bonding wires, eliminating redundant wiring components and reducing the overall wiring area while maintaining electrical connection reliability.
Solution Approach 2:
The conductive member serves multiple functions simultaneously: it acts as an electrical connector, a structural support, and a wiring interconnect. This multi-functional design replaces the conventional separate components (lead frame + bonding wires + insulation layers), reducing wiring area and simplifying the overall structure.
2Reliability
If complex lead frames and bonding wires are used to connect semiconductor chips, then electrical connections are established, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent combines multiple discrete components (lead frame, bonding wires, insulation layers) into a single integrated conductive member structure. This merging reduces the number of parts, simplifies the device structure, and decreases manufacturing complexity while maintaining reliable electrical connections between semiconductor chips.
Solution Approach 2:
The conductive member is designed with segmented or patterned structures that provide multiple connection points and pathways within a single component. This segmentation allows the conductive member to perform the functions of multiple separate components while maintaining structural simplicity and ease of manufacturing.
3Reliability
If conventional wiring structures are used with multiple components, then electrical connections are achieved, but the manufacturing process becomes more difficult and costly
Solution Approach 1:
The patent integrates the lead frame and bonding wire functions into a single conductive member that can be manufactured as one piece. This eliminates the need for separate assembly steps to attach bonding wires and position lead frames, significantly simplifying the manufacturing process while ensuring stable electrical connections through the integrated structure.
Solution Approach 2:
The conductive member is pre-formed with its final three-dimensional shape and connection points before assembly. This preliminary formation allows the component to be directly installed in its functional configuration, eliminating complex assembly steps and reducing manufacturing difficulty while ensuring reliable electrical connections are established from the outset.
Data Source
AI summary
A semiconductor device includes: a first semiconductor chip and a second semiconductor chip each including a first main electrode on a bottom surface side and a second main electrode on a top surface side; a conductive member provided to electrically connect the first main electrode of the first semiconductor chip to the second main electrode of the second semiconductor chip; a first external terminal electrically connected to the second main electrode of the first semiconductor chip and partly opposed to the conductive member, and a resin member provided to be at least partly arranged between the conductive member and the first external terminal.


