Chip Package Buffer Structure for Corner Stress Relief
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Solution Overview
Problem
Forming a reliable chip package structure with multiple chips is challenging due to the need to manage thermal expansion mismatch between semiconductor chips and substrates, which can lead to stress and potential damage at the chip package corners.
Innovation Solution
Incorporating buffer structures with a lower Young's modulus than the substrate into the chip package design, these structures are positioned under the chip and interposer substrate corners to effectively buffer the stress caused by thermal expansion mismatch, using materials like epoxy or silicon glue, and forming them in recesses within the substrate to provide adequate coverage and protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If buffer structures with lower Young's modulus are incorporated to manage thermal expansion mismatch, then stress concentration at chip package corners is reduced, but device complexity increases
Solution Approach 1:
Buffer structures are formed in recesses of the substrate before the chip and interposer substrate are mounted. This preliminary formation allows the buffer structures to be in place to absorb thermal expansion stress before the chip package assembly occurs, preventing stress concentration at corners during subsequent thermal cycling
Solution Approach 2:
The buffer structures act as intermediary elements between the rigid substrate and the chip/interposer assembly. These structures with lower Young's modulus serve as a compliant interface that absorbs differential thermal expansion, mediating the stress between components with different thermal expansion coefficients
2Reliability
If buffer structures are formed in recesses to provide adequate coverage, then stress buffering effectiveness is improved, but manufacturing precision requirements increase
Solution Approach 1:
The buffer structures are segmented and placed in discrete recesses at specific locations (corners and along sides) of the substrate rather than forming a continuous layer. This segmentation allows for targeted stress buffering at critical locations while reducing the overall manufacturing complexity and precision requirements compared to a full-coverage buffer layer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buffer structures effectively reduce stress concentrations at the chip package corners, protecting the underfill layers and solder bumps from damage, thereby enhancing the reliability and durability of the chip package structure.
Implementation Method 1
the stress resulting from the coefficient of thermal expansion mismatch between chip structures of the chip package and the wiring substrate
Implementation Method 2
stress concentrations at the chip package corners
Data Source
AI summary
A method for forming a chip package structure is provided. The method includes removing a first portion of a substrate to form a first recess in the substrate. The method includes forming a buffer structure in the first recess. A first Young's modulus of the buffer structure is less than a second Young's modulus of the substrate. The method includes forming a first wiring structure over the buffer structure and the substrate. The method includes bonding a chip package to the first wiring structure. The chip package has an interposer substrate and a chip structure over the interposer substrate, and a first corner of the interposer substrate and a second corner of the chip structure overlap the buffer structure in a top view of the chip package and the buffer structure.