Chip Package IO Mapping for Partially Functional Multi-Core Dies
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Solution Overview
Problem
Designing a chip package for partially functional chips is complex and costly, as existing methods require customizing the package design for specific fully functional chips, which is not feasible when some core processors are defective, leading to operational issues in printed circuit boards.
Innovation Solution
A method and apparatus that configure IO blocks and package stackups based on the operational status of processor cores, utilizing a design initially intended for fully functional chips, by strategically mapping IO bumps to active and defective core processors, reducing the number of layers and simplifying the design process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a chip package design is made for a fully functional chip, then the package can support all processor cores, but the entire printed circuit board becomes non-operational if any processor core is defective
Solution Approach 1:
The package design segments the IO blocks into multiple groups, each group corresponding to specific processor cores. This allows selective activation of IO blocks based on which processor cores are functional, enabling the package to adapt to partially functional chips while maintaining reliability of the printed circuit board.
Solution Approach 2:
The package design incorporates dynamic configuration capability where IO blocks can be selectively enabled or disabled based on the operational status of processor cores. This dynamic adaptation allows the same package design to work with both fully functional and partially functional chips, resolving the contradiction between reliability and adaptability.
2Ease of manufacture
If a chip package is designed specifically for partially functional chips, then manufacturing complexity is reduced, but the package cannot be used with fully functional chips
Solution Approach 1:
The package design achieves universality by incorporating all IO blocks in the design, but enabling selective activation. The package can function with fully functional chips (all IO blocks active) or partially functional chips (only necessary IO blocks active), eliminating the need for different package designs and reducing manufacturing complexity.
Solution Approach 2:
The package design changes the operational parameters of IO blocks based on chip functionality. By configuring which IO blocks are active versus inactive, the same physical package design can accommodate different chip functional states, achieving versatility without increasing manufacturing complexity.
3Reliability
If all IO blocks are configured for a fully functional chip, then complete functionality is achieved, but the package design becomes complicated and expensive for chips with defective cores
Solution Approach 1:
The package design applies local quality by configuring different IO blocks with different operational states (active or inactive) based on the specific functional requirements. Instead of uniformly configuring all IO blocks, only the necessary ones are activated, reducing package design complexity while maintaining functional completeness.
Solution Approach 2:
The package design implements partial action by activating only the IO blocks necessary for the functional processor cores. This avoids the excessive complexity of configuring all IO blocks when some processor cores are defective, reducing package design complexity while maintaining adequate functionality.
Data Source
AI summary
A method including obtaining an operational status of a first processor core, where the first processor core is associated with a plurality of processor cores located on a chip; configuring a first IO block of a package design based on the operational status of the first processor core, where the package design is based on a fully functional chip; and configuring a stackup of the package design after configuring the first IO block for use with the chip.