Chip Package EMI Shielding via Peripheral Ground Ring
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Solution Overview
Problem
As chip packages become thinner and lighter, they face increased challenges in forming effective electromagnetic interference (EMI) shield structures due to limited EMI ground pad positions and rising manufacturing costs.
Innovation Solution
A chip package design featuring a semiconductor substrate with signal and EMI ground pad structures, where conducting layers are strategically placed to expose these pads and extend to the periphery of scribe regions, allowing for efficient EMI shielding through a third conducting layer that connects to the EMI ground pad structure after dicing, thereby addressing the EMI challenges while maintaining signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Weight of moving object
If chip packages are made thinner and lighter, then weight and size are reduced, but EMI shielding effectiveness deteriorates
Solution Approach 1:
The patent extends the EMI ground pad structure from a two-dimensional planar configuration into the third dimension by creating vertical conducting layers that penetrate through the substrate thickness. The ground pad structure extends from the first surface through openings to the second surface, and the third conducting layer wraps around the periphery, creating a three-dimensional EMI shielding network that provides effective grounding in thin-profile packages.
Solution Approach 2:
The patent implements a nested structure where the third conducting layer surrounds the periphery of the substrate and connects to the vertical ground pad structures that extend through the substrate thickness. This nested configuration creates multiple levels of EMI shielding, with the peripheral ground ring nested around the central device regions, providing comprehensive EMI protection within the limited package volume.
2Area of stationary object
If EMI ground pad positions are limited due to shrinking package size, then package density increases, but EMI shielding effectiveness deteriorates
Solution Approach 1:
The patent compensates for limited planar area by utilizing the vertical dimension. The ground pad structure extends vertically through the substrate thickness via openings, and the third conducting layer provides peripheral grounding around the edges. This three-dimensional grounding network provides sufficient EMI shielding effectiveness even when the planar package area is constrained.
Solution Approach 2:
The patent segments the EMI grounding function into multiple distributed elements: vertical ground pad structures at specific device locations, and a peripheral ground ring around the substrate edges. This segmentation allows EMI shielding to be achieved through distributed grounding points rather than requiring large continuous ground areas, making it suitable for compact packages.
3Object-affected harmful factors
If conducting layers extend to scribe region periphery for EMI shielding, then EMI protection improves, but manufacturing complexity increases
Solution Approach 1:
The patent merges the EMI shielding function with the existing scribe region structure. The third conducting layer is formed to surround the periphery of the remained scribe region, utilizing the natural boundary defined by the scribe lines. This integration allows the EMI shielding structure to be implemented without adding separate complex shielding components, as the scribe region periphery serves as the natural boundary for the ground ring.
Solution Approach 2:
The third conducting layer serves multiple functions: it provides EMI shielding by surrounding the active device regions, provides peripheral grounding connections, and defines the boundary of the remained scribe region. This multi-functional design reduces overall device complexity by combining several functions into a single structural element rather than requiring separate components for each function.
Data Source
AI summary
A chip package includes a substrate having a pad region, a device region, and a remained scribe region located at a periphery of the substrate; a signal and an EMI ground pads disposed on the pad region; a first and a second openings penetrating into the substrate to expose the signal and the EMI ground pads, respectively; a first and a second conducting layers located in the first and the second openings and electrically connecting the signal and the EMI ground pads, respectively, wherein the first conducting layer and the signal pad are separated from a periphery of the remained scribe region, and wherein a portion of the second conducting layer and/or the EMI ground pad extend(s) to a periphery of the remained scribe region; and a third conducting layer surrounding the periphery of the remained scribe region to electrically connect the second conducting layer and/or the EMI ground pad.