Chip Pad Arrangement for Solder Joint Strength
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Solution Overview
Problem
The increasing complexity and miniaturization of chip circuits in electronic devices lead to reduced structural strength and soldering strength between pads and tin balls, causing potential solder joint fractures and device damage during testing and use.
Innovation Solution
The design of chip and circuit board substrates with specific pad arrangements, where first pads in the edge area have a polygonal soldering area adjacent to a side and an arcuate soldering area, and second pads in the central area, to distribute stress and enhance bonding strength by sharing peripheral edge stress and decomposing internal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If pad size is reduced to fit increasing chip circuit complexity, then chip functionality and integration are improved, but structural strength and soldering strength of pads are reduced
Solution Approach 1:
The patent applies local quality by differentiating pad structures based on their location: edge area pads have a first structure with extended support, while central area pads have a second structure. This localized structural differentiation allows each pad to be optimized for its specific position, maintaining strength where needed while enabling overall miniaturization.
Solution Approach 2:
The patent segments the chip substrate into distinct edge area and central area zones with different pad configurations. This segmentation allows the design to address the specific mechanical requirements of edge pads (which experience higher stress) differently from central pads, enabling reduced overall pad size while maintaining reliability.
2Productivity
If pad spacing is reduced to increase circuit density, then chip integration is improved, but soldering strength and structural integrity are reduced
Solution Approach 1:
The patent implements local quality through position-dependent pad structures: edge area pads feature extended support structures that provide additional mechanical reinforcement, while central area pads use a different configuration. This allows tighter spacing throughout the chip while edge pads maintain sufficient strength for soldering and handling.
Solution Approach 2:
By segmenting the pad design into two distinct types based on location, the patent enables reduced minimum spacing between pads overall, while the reinforced edge area pads compensate for the reduced margins, maintaining solder joint reliability despite increased density.
3Length of moving object
If pad size is reduced for miniaturization, then device thinness is improved, but resistance to impact and mechanical stress is reduced
Solution Approach 1:
The patent applies local quality by providing enhanced structural support specifically at edge area pads, which are more susceptible to impact and mechanical stress. The first pad structure includes extended support features that increase impact resistance locally, while the overall device maintains thinness through reduced pad sizes in the central area.
Solution Approach 2:
The segmentation of pad structures allows the device to achieve thinness through reduced pad sizes while the reinforced edge pads provide localized impact resistance. This segmented approach enables the device to be both thin and mechanically robust at critical locations.
Data Source
AI summary
A chip includes: a chip substrate including a central area and an edge area surrounding the central area; and a plurality of pads arranged on the chip substrate, the plurality of pads including a first pad and a second pad, wherein the first pad is arranged in the edge area and includes at least one straight side adjacent to a side of the chip substrate, and the second pad is arranged in the central area.