Distributed Chip-on-Board Power Layout for Low-Impedance Response
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing power supply structures on mainboards face challenges in meeting the increasing demands of processor chips due to high voltage differences, impedance issues, and spatial limitations, which affect dynamic response and efficiency.
Innovation Solution
A system with a first power supply located on the board, a second power supply on one side of the chip, and a third power supply on the other side, reducing line impedance and volume, and improving response and frequency characteristics by distributing power supplies more efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single post-stage power supply is used to convert voltage for the chip, then the power supply structure is simple, but the line impedance is high and dynamic response is slow
Solution Approach 1:
The patent divides the single post-stage power supply into multiple power supply modules (first power supply module, second power supply module, etc.) positioned at different locations around the chip. Each module independently provides power to specific regions, reducing the impedance of power delivery paths and improving dynamic response capability without significantly increasing overall system complexity
2Loss of energy
If the bus voltage is increased to 48V or 400V to reduce transmission loss, then power transmission efficiency improves, but the voltage difference between input and output of the power supply increases
Solution Approach 1:
The patent employs a two-stage power conversion architecture where the first stage (preceding-stage power supply) converts high voltage (48V/400V) to an intermediate voltage, and the second stage (post-stage power supply modules) converts the intermediate voltage to the final chip operating voltage. This segmentation of voltage conversion stages reduces the voltage difference burden on any single converter, improving efficiency while maintaining high bus voltage benefits
Solution Approach 2:
The patent introduces an intermediate voltage stage between the high-voltage bus and the chip operating voltage. This intermediary voltage level acts as a buffer, allowing efficient power transmission at high voltage while enabling gradual voltage reduction through multiple conversion stages, thus reducing transmission loss without overwhelming the power supply conversion complexity
3Ease of operation
If the power supply is placed far from the chip to accommodate board layout, then spatial arrangement is easier, but the line impedance increases and affects performance
Solution Approach 1:
The patent positions multiple power supply modules at different locations around the chip (first module at first location, second module at second location, etc.), creating distributed power delivery. This segmentation allows each module to be optimally positioned relative to specific chip regions, minimizing local impedance while maintaining overall layout flexibility
Solution Approach 2:
The patent utilizes both sides of the circuit board for power supply module placement, transitioning from a single-plane to a dual-plane configuration. This dimensional expansion allows power supplies to be positioned closer to the chip from multiple spatial directions, reducing line impedance while accommodating board layout constraints
4Speed
If multiple post-stage power supplies are used to reduce impedance, then dynamic response improves, but the volume and complexity of the power supply system increases
Solution Approach 1:
The patent divides the power supply system into multiple compact modules positioned around the chip, with each module serving a specific region. This segmentation enables reduced impedance paths while keeping individual module volumes small, and the distributed arrangement utilizes available board space efficiently rather than requiring a single large power supply
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system reduces voltage fluctuations and impedance, enhances dynamic response, and increases efficiency by optimizing the placement and control of multiple power supplies, allowing for better performance and heat management.
Implementation Method 1
a first power supply located on the board and configured to receive a first voltage and provide a second voltage
Implementation Method 2
a second power supply located on the board and electrically connected to the first power supply... provides a third voltage to the chip; and a third power supply located on the board and electrically connected to the first power supply... provides a fourth voltage to the chip
Data Source
AI summary
A system for providing power to a chip on a board includes a first power supply located on the board and configured to receive a first voltage and provide a second voltage, a second power supply located on the board and electrically connected to the first power supply, and a third power supply located on the board and electrically connected to the first power supply. The second power supply is located at a first side of the chip, the third power supply is located at a second side of the chip, the second power supply provides a third voltage to the chip, and the third power supply provides a fourth voltage to the chip.