Semiconductor Chip Power Pad Edge Repositioning
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Solution Overview
Problem
Conventional semiconductor chip packaging techniques require larger power supply lines to ensure stable power delivery, which increases the overall size of the chip and limits integration density due to the need for critical separation distances between components.
Innovation Solution
The semiconductor chip package design includes a power supply input pad positioned on the output side edge, allowing for a more compact power supply line geometry and reduced surface area usage by connecting it to input pads on the input side edge through extension lines on the film substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional packaging techniques use larger power supply lines to ensure stable power delivery, then power delivery stability is improved, but chip size increases and integration density decreases
Solution Approach 1:
The patent positions the power supply input pad on the output side edge of the chip rather than the input side edge, utilizing the vertical/dimensional arrangement of pads along the edge. This dimensional repositioning allows the power supply line to traverse a shorter path across the chip surface, reducing the area occupied by the power supply line while maintaining electrical connection stability.
Solution Approach 2:
Conventionally, the power supply input pad is positioned on the input side edge of the chip. This patent inverts that conventional arrangement by placing the power supply input pad on the output side edge instead. This inversion allows the power supply line to be routed more efficiently across the chip, reducing its surface area occupation and enabling higher integration density.
2Reliability
If conventional packaging techniques use larger power supply lines, then power delivery stability is improved, but integration density decreases due to critical separation distances
Solution Approach 1:
By repositioning the power supply input pad to the output side edge, the patent creates a more efficient spatial arrangement that reduces the horizontal spread of the power supply line. This dimensional optimization frees up chip area for additional functional elements, thereby increasing integration density while preserving power delivery reliability.
Solution Approach 2:
The patent changes the positional parameter of the power supply input pad from the conventional input side edge location to the output side edge location. This parameter change optimizes the geometry of the power supply line, allowing it to occupy less surface area and enabling closer placement of other chip components, thus improving integration density.
3Ease of manufacture
If power supply input pad is positioned on the input side edge, then conventional layout is maintained, but surface area usage increases
Solution Approach 1:
The patent inverts the conventional placement of the power supply input pad by positioning it on the output side edge instead of the input side edge. This inversion counteracts the conventional layout pattern that causes excessive surface area usage, allowing for a more compact power supply line geometry and more efficient chip area utilization.
Data Source
AI summary
A semiconductor chip package including a film substrate and a semiconductor chip loaded on the semiconductor chip is provided. The semiconductor chip includes a plurality of input pads and a plurality of output pads. A power supply input pad of the input pads is formed at a different edge from an edge of the semiconductor chip where other input pads are formed. The film substrate includes input lines and output lines. The input lines of the film substrate are connected to the corresponding input pads of the semiconductor chip, and the output lines thereof are connected to the corresponding output pads of the semiconductor chip.