Semiconductor Chip Sidewall Recesses for Underfill Resin Control
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Solution Overview
Problem
The challenge of controlling thermosetting resin that crawls up on the side surfaces of semiconductor chips, leading to potential exposure of electrical connections and impaired device performance, is addressed by forming a strip-shaped region with recesses on the side surfaces of the semiconductor chip.
Innovation Solution
A semiconductor chip with a strip-shaped region featuring a plurality of recesses on its side surfaces is manufactured using internal laser focusing to form underfill pockets, which control the crawling of underfill resin and protect electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thermosetting resin is applied to protect electrical connections, then reliability of electrical connections is improved, but the resin may crawl up onto the chip surface causing manufacturing defects
Solution Approach 1:
The patent applies local quality by creating recesses only in specific regions where resin crawling needs to be controlled. The side surfaces of the chip are locally modified with recesses at predetermined positions and intervals, allowing the resin to be contained within these recesses rather than crawling up the entire side surface. This localized structural modification enables precise control of resin height while maintaining overall chip integrity.
Solution Approach 2:
The patent implements preliminary action by forming the recesses on the chip side surfaces before the resin application process. These pre-formed recesses act as receptacles that guide and limit the resin crawling process, ensuring that the resin is contained within acceptable height limits before it can cause manufacturing defects. The recesses are prepared in advance to control the resin behavior during subsequent packaging operations.
2Manufacturing precision
If additional structural features are added to control resin crawling, then manufacturing precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent utilizes a porous-like structure by creating multiple small recesses on the chip side surfaces. These recesses form a distributed network of containment zones that collectively control resin crawling throughout the chip perimeter. The recesses are formed with appropriate depth and spacing to provide effective resin containment while maintaining a relatively simple overall chip structure that integrates well with standard packaging processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The underfill pockets effectively manage the application amount of underfill resin, preventing exposure of electrical connections and allowing for a reduction in semiconductor chip size and cost.
Implementation Method 1
a semiconductor chip manufacturing device manufactures a semiconductor chip having a strip-shaped region including a plurality of recesses on a side surface of the semiconductor chip and forms the recesses by internally focusing laser light
Data Source
AI summary
The present disclosure relates to a semiconductor chip that allows electrical connections to be protected and a manufacturing method therefor.A semiconductor chip has a strip-shaped region including a plurality of recesses on a side surface thereof. The recesses are arranged in a matrix of rows and columns on the side surface of the semiconductor chip or in a zig-zag pattern in the region. At least two of the strip-shaped regions are formed. The strip-shaped regions are formed in different positions between the vicinity of the center and opposed ends of the side surface. The strip-shaped region is partly inclined. The present disclosure can be applied for example to a semiconductor chip for a semiconductor device in which connections for electrically connecting the semiconductor chip and the substrate are protected with underfill.