Chip-stacked semiconductor package with flexible circuit folding
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Solution Overview
Problem
There is a need for semiconductor packages that are small in size, multifunctional, and high-capacity while maintaining reliability and low manufacturing costs, which existing technologies have not adequately addressed.
Innovation Solution
A chip-stacked semiconductor package is developed using a flexible circuit substrate with a stacked chip structure, where separate chips are bonded via an adhesive layer and electrically connected using a folding region of the substrate, allowing for various configurations such as stair-shaped stacking and connection via wires or pads, with a sealing portion to protect the components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple chips are stacked vertically to increase capacity and reduce size, then the package density and functionality are improved, but the manufacturing complexity and alignment precision requirements increase
Solution Approach 1:
The patent divides the chip interconnection system into separate functional layers: the flexible circuit substrate handles routing and connection, while the chip stacking handles computation and storage. This segmentation allows independent optimization of each component, reducing overall manufacturing complexity despite vertical integration.
Solution Approach 2:
The patent implements vertical stacking of multiple chips where smaller chips are positioned on top of larger ones, creating a nested configuration. This nesting approach maximizes space utilization and increases capacity within a compact footprint while maintaining manageable manufacturing complexity through standardized interconnection interfaces.
2Adaptability or versatility
If a flexible circuit substrate is used to connect stacked chips, then the package adaptability and electrical connection reliability are improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent employs a flexible circuit substrate that can be folded and bent to achieve electrical connections between stacked chips. This dynamic approach allows the substrate to adapt to different chip configurations and positions, improving package versatility while the folding mechanism itself provides alignment tolerance that reduces manufacturing precision requirements.
Solution Approach 2:
The patent uses a thin flexible circuit substrate as the interconnection medium between chips. The flexibility of this thin film allows it to conform to various chip arrangements and provides mechanical compliance that accommodates manufacturing variations, thereby improving adaptability without excessively increasing precision requirements.
3Reliability
If chips are bonded with adhesive layers to achieve stable stacking, then the structural reliability is improved, but the manufacturing complexity and material requirements increase
Solution Approach 1:
The patent uses adhesive layers as composite material interfaces between stacked chips. These adhesive layers provide both mechanical bonding and electrical connection functions, integrating multiple roles into a single material layer. This approach improves structural reliability while actually reducing overall device complexity by eliminating the need for separate bonding and interconnection processes.
Data Source
AI summary
A chip-stacked semiconductor package including a stacked chip structure including a plurality of separate chips stacked on each other; a flexible circuit substrate having the stacked chip structure mounted on a first side of the flexible circuit substrate in a first region of the flexible circuit substrate, and being electrically connected to at least one of the plurality of separate chips of the stacked chip structure by folding a second region of the flexible circuit substrate; a sealing portion sealing the stacked chip structure and the flexible circuit substrate; and an external connecting terminal on a second side of the flexible circuit substrate.