Stair-Step Semiconductor Package Support for Wire Bond Stability

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Conventional methods for addressing issues like bouncing, wire bonding defects, and protrusion cracks in multi-chip packages face limitations, such as increased package thickness and space consumption by spacer chips, and reduce productivity by pausing manufacturing for chip movement dissipation.

Innovation Solution

A semiconductor package design featuring support structures that are inclined relative to the package substrate, supporting the uppermost semiconductor chip to compensate for height differences, preventing bouncing and improving productivity while reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the thickness of the uppermost semiconductor chip is increased to prevent bouncing and wire bonding defects, then the reliability of the semiconductor package is improved, but the overall thickness of the semiconductor package increases

Engineering Contradiction:

Improveprevention of bouncing and wire bonding defectsVSAvoidoverall thickness of semiconductor package

Core Design Contradiction:

ReliabilityVSLength of stationary object

Solution Approach 1:

The patent introduces support structures as intermediary elements between the uppermost semiconductor chip and the package substrate. These support structures provide mechanical support to prevent bouncing and wire bonding defects without requiring an increase in the thickness of the semiconductor chip itself, thus resolving the contradiction between reliability improvement and package thickness control.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the support function from the semiconductor chip itself by introducing separate support structures. This segmentation allows the chip to maintain its original thickness while still receiving the necessary support to prevent bouncing and bonding defects, addressing the contradiction between reliability and package thickness.

Inventive Principle:

Principle #1Segmentation

2Stability of the object's composition

If spacer chips are added to support the uppermost semiconductor chip, then the stability of the chip is improved, but the space consumption increases

Engineering Contradiction:

Improvestability of uppermost semiconductor chipVSAvoidspace consumption in package

Core Design Contradiction:

Stability of the object's compositionVSArea of stationary object

Solution Approach 1:

The patent extracts the support function from traditional spacer chips and implements it through integrated support structures that are formed as part of the wire bonding process. This eliminates the need for separate spacer chips, providing chip stability without consuming additional package space.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the support structure formation with the wire bonding process, combining two functions into a single integrated structure. This eliminates the need for separate spacer chips while maintaining chip stability, thus resolving the contradiction between stability improvement and space consumption.

Inventive Principle:

Principle #5Merging (Combining)

3Manufacturing precision

If manufacturing is paused to allow chip movements to dissipate, then the quality of wire bonding is improved, but the productivity decreases

Engineering Contradiction:

Improvequality of wire bondingVSAvoidmanufacturing throughput

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent implements preliminary action by forming support structures during the wire bonding process itself, before bonding defects can occur. This prevents the need for pausing manufacturing to allow chip movements to dissipate, thereby maintaining both bonding quality and productivity.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent enables continuous manufacturing by integrating support structure formation into the wire bonding process. This eliminates the need to pause production for quality control purposes, maintaining continuous useful action and high productivity while ensuring bonding quality through proper chip support.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS12622000B2Semiconductor package and method of manufacturing the semiconductor package

Publication Date: 2026.05.05 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor package includes a package substrate, a plurality of first semiconductor chips stacked on an upper surface of the package substrate in a stair-step configuration, the plurality of first semiconductor chips having an uppermost semiconductor chip at a first height from the upper surface of the package substrate, the uppermost semiconductor chip including a free end portion. Conductive wires respectively electrically connect chip pads of the first semiconductor chips to substrate pads of the package substrate. A plurality of first support structures each have a first end attached to the upper surface of the package substrate and an opposite second end attached to the free end portion of the uppermost semiconductor chip. The first support structures are inclined at an angle relative to the package substrate.