Chip Component Surface Roughness Tuning for Crack Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional chip-type electronic components face issues with cracks originating from surface imperfections during manufacturing, which compromise their reliability.
Innovation Solution
The chip-type electronic component is designed with specific surface roughness (RSm 3.0 μm to 7.0 μm and Ra 0.005 μm to 0.075 μm) and strategic Si segregation distribution to alleviate surface irregularities, preventing crack initiation and progression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the surface roughness RSm is smaller than 3.0 μm, then the surface appears smoother, but the surface irregularities become sharper and cracks are more likely to occur
Solution Approach 1:
The patent applies parameter changes by optimizing the surface roughness RSm to a specific range (3.0 μm or more and 7.0 μm or less). This parameter optimization resolves the contradiction by finding the optimal balance point where the surface is smooth enough for manufacturing quality but rough enough to have rounded irregularities that prevent crack initiation.
2Manufacturing precision
If the surface roughness RSm is larger than 7.0 μm, then surface irregularities are larger, but this also increases the likelihood of crack occurrence
Solution Approach 1:
The patent applies parameter changes by setting the upper limit of surface roughness RSm at 7.0 μm or less. This prevents surface irregularities from becoming too large and prominent, which would create stress concentration points and initiate cracks, thus resolving the contradiction between surface uniformity and crack resistance.
3Ease of manufacture
If barrel polishing is applied to expose internal electrode ends, then the electrodes are properly exposed, but surface chipping and cracks may occur
Solution Approach 1:
The patent applies preliminary action by pre-optimizing the surface roughness parameters before the barrel polishing process. This preliminary surface preparation ensures that when barrel polishing is subsequently applied to expose the internal electrode ends, the surface is already in an optimal state that resists chipping and crack formation, thus resolving the contradiction between ease of manufacture and surface integrity.
Data Source
AI summary
A chip-type electronic component includes: an element body in which dielectric layers and internal electrodes are alternately stacked; and a pair of external electrodes respectively provided on a pair of end surfaces of the element body and electrically connected to the internal electrodes, and in the element body, surface roughness of a side surface connecting the pair of end surfaces is 3.0 μm or more and 7.0 μm or less.