Chip-on-Wafer Bonding Under Pressure Change to Shrink Voids
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In chip-on-wafer bonding technology, voids form between the chip and the wafer, which can lead to disconnections in electrical connections, compromising the reliability and density of device mounting.
Innovation Solution
The method involves bonding semiconductor devices in a low-pressure environment, where a planar surface of the chip is moved towards a planar surface of the wafer, forming a void, and then transferring the bonded structure to a standard atmosphere, where the void size is reduced, ensuring minimal disconnection by relocating voids to the peripheral region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If chip-on-wafer bonding is performed to increase device mounting density, then device mounting density is improved, but voids form between chip and wafer causing electrical connection disconnections
Solution Approach 1:
The patent changes the pressure parameter during bonding by performing the bonding process in a low-pressure environment (vacuum or reduced pressure). This parameter change causes voids to form during bonding but then collapse when the structure is returned to standard atmosphere, effectively eliminating voids that would cause electrical disconnections while maintaining high device mounting density
Solution Approach 2:
The patent performs preliminary void formation during the bonding process itself by controlling pressure conditions. Voids are intentionally formed during low-pressure bonding, then subsequently collapsed by exposing the bonded structure to standard atmosphere, ensuring electrical connections are established before void collapse occurs
2Ease of manufacture
If voids are sealed between chip and wafer during bonding, then bonding structure is formed, but electrical connections may be disconnected by the voids
Solution Approach 1:
The patent converts the harmful effect of voids into a beneficial process. Voids that would normally cause electrical disconnections are instead used as a mechanism to ensure proper bonding contact. The voids form during low-pressure bonding, then collapse upon exposure to standard atmosphere, actively pushing the chip into contact with the wafer to ensure electrical connection continuity while maintaining manufacturing ease
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes electrical disconnections and enhances the density of device mounting by reducing void sizes, thereby improving the yield and reliability of semiconductor structures.
Implementation Method 1
A method is provided that includes bonding a chip to a wafer in a low-pressure environment to form a bonded structure. In the low-pressure environment, a planar surface of the chip is moved toward a planar surface of the wafer... The bonded structure is transferred to a standard atmosphere, where the void size is reduced
Data Source
AI summary
A method for bonding semiconductor devices is provided. The method may include several operations. A wafer and a chip are formed. The wafer and the chip are disposed in a low-pressure environment. A planar surface of the chip is moved toward a planar surface of the wafer. A void is formed between the planar surface of the chip and the planar surface of the wafer. The chip is bonded to the wafer. A bonded structure of the chip and the wafer is disposed under a standard atmosphere and a size of the void is reduced. A system for forming a semiconductor structure is also provided.