Chiplet GPU DVFS for Per-Chunk Power Delivery

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Solution Overview

Problem

The increasing power requirements of graphics processors in consumer computing systems are straining the power delivery capabilities of typical power supplies, necessitating a more efficient balance between power and performance in integrated circuits.

Innovation Solution

A chiplet architecture with granular dynamic voltage and frequency scaling (DVFS) is implemented, allowing for late bind SKU fungibility and chunking of homogenous or heterogeneous chiplets into uniform power delivery chunks, enabling per-chunk power configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the amount of logic in integrated circuits is increased to improve processing power, then performance is improved, but power requirements escalate and strain power delivery capabilities

Engineering Contradiction:
Improveprocessing powerVSAvoidpower requirements
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The integrated circuit is divided into multiple processing elements (PEs) that can be independently controlled. Each PE can be individually powered down or placed in low-power states when not needed, allowing the system to maintain high processing power when required while significantly reducing power consumption during partial utilization scenarios.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements dynamic power management where the power state of processing elements is adjusted in real-time based on workload demands. The controller monitors execution unit activity and dynamically transitions PEs between active and low-power states, enabling the system to adapt processing power to actual needs and avoid unnecessary power consumption.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If traditional power management approaches are used, then power delivery is simplified, but energy efficiency deteriorates due to inability to selectively power down processing elements

Engineering Contradiction:
Improveenergy efficiencyVSAvoidpower management complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

A controller acts as an intermediary between the execution units and processing elements. This controller monitors the activity status of execution units and automatically manages the power states of corresponding processing elements, eliminating the need for complex manual power management while achieving superior energy efficiency through selective power down.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The power management system operates autonomously by monitoring execution unit activity and automatically adjusting processing element power states. The system self-regulates power consumption based on actual workload without requiring external intervention, simplifying the user interface while maintaining high energy efficiency.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12437355B2Granular GPU DVFS with execution unit partial powerdown
Publication Date: 2025.10.07 INTEL CORP
  • US12437355B2 patent drawing
  • US12437355B2 patent drawing
  • US12437355B2 patent drawing

AI summary

Described herein, in one embodiment, is a graphics processor comprising a plurality of dies integrated in a package, at least one die of the plurality of dies functionally heterogeneous relative to at least one other die of the plurality of dies and manufactured with a different process technology than the at least one other die.