Chipset Lane Configuration Module for Dynamic Bandwidth Allocation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional chipsets have fixed numbers of lanes, which cannot provide varying data transmission bandwidths to meet the diverse requirements of different computer applications, limiting their adaptability to various peripheral devices and computer systems.
Innovation Solution
A configuration module is introduced to dynamically assign lanes to access ports based on setting signals, allowing for different lane configurations to be implemented with an identical circuit design, enabling flexible data transmission bandwidth allocation to peripheral devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional chipset uses a fixed number of lanes for each access port, then the circuit design is simple and stable, but the adaptability to different applications and peripheral devices is poor
Solution Approach 1:
The patent implements dynamic lane configuration by introducing a configuration module that can dynamically assign different numbers of lanes to different access ports based on application requirements. The system transitions from static fixed lane allocation to dynamic adjustable lane allocation, allowing the chipset to adapt to various bandwidth needs without changing the physical circuit structure.
Solution Approach 2:
The configuration module serves multiple functions: it receives setting signals, determines lane numbers for each access module, configures lane assignments, and enables the same hardware to support different application scenarios (single-lane, four-lane, eight-lane, sixteen-lane configurations) without requiring multiple dedicated circuit designs.
2Adaptability or versatility
If the chipset provides multiple access ports with different fixed lane configurations, then different bandwidth requirements can be met, but the device complexity and circuit design diversity increase
Solution Approach 1:
The patent employs a universal configuration module that can handle all lane configuration scenarios (1x1, 4x1, 8x1, 16x1, 1x4, 4x4, etc.) through a single unified design. This module receives setting signals and dynamically configures the connection between lanes and access modules, eliminating the need for multiple dedicated circuit designs for different bandwidth requirements.
Solution Approach 2:
The system changes the operational parameters (lane assignment configurations) rather than the physical structure. By modifying the configuration parameters through setting signals, the same hardware can provide different bandwidths (1 lane, 4 lanes, 8 lanes, or 16 lanes) to different access ports, avoiding the complexity of designing and manufacturing multiple hardware variants.
3Productivity
If a chipset is designed with a specific lane configuration for optimal performance in one application, then the data transmission efficiency is maximized for that application, but the efficiency for other applications with different bandwidth needs is reduced
Solution Approach 1:
The configuration module dynamically adjusts lane assignments based on the specific application's bandwidth requirements, ensuring optimal data transmission efficiency for each scenario. Whether the application needs high bandwidth (16 lanes for display cards) or moderate bandwidth (4 or 8 lanes for network devices), the system configures the lanes accordingly to maximize efficiency.
Data Source
AI summary
A method and related apparatus for different lane and access port configurations of a bus. Such different configurations can apply to different applications requirements. In a preferred embodiment of the invention, a chipset can configure 18 lanes to 4 access ports of a peripheral communication interconnect express bus for selectively 4 different configurations. A first configuration provides single access port with 16 lanes, and two access ports for each has one lane. A second configuration provides two access ports for each has eight lanes, and two access ports for each has single lane. A third configuration provides one access port with eight lanes, two access ports for each has four lanes and another one access port with single lane. And a fourth configuration provides four access ports for each has four lanes.


