Compute-in-Memory MAC Array With Low Bit-Toggling Control
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Solution Overview
Problem
Conventional computer systems are inefficient for data processing in machine learning applications due to excessive data transfers between memory and processors, leading to high power consumption and slow compute times.
Innovation Solution
The Compute-in-Memory (CiM) system performs compute operations directly within a memory array, reducing data transfer by computing MAC values on input signals using an array of macros and a control circuit, which minimizes bit toggling and thereby decreases power consumption while maintaining high-speed computation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If data is processed using conventional computer hardware with separate memory and processors, then data storage capacity is sufficient, but power consumption increases and compute time slows due to excessive data transfers between memory and processors
Solution Approach 1:
The patent merges memory and processing functions into a unified compute-in-memory architecture where MAC operations are performed directly within the memory array. This integration eliminates the need for separate memory and processor components, reducing data transfer overhead and power consumption while maintaining sufficient storage capacity.
Solution Approach 2:
The patent transitions from a traditional von Neumann architecture (separate memory and processor dimensions) to an in-memory computing architecture where computation occurs within the memory dimension itself. This dimensional shift allows MAC operations to be performed at the location of data storage, eliminating data movement between separate components.
2Productivity
If data is transferred frequently between memory and processors for processing, then computation can be performed, but compute time increases due to transfer overhead
Solution Approach 1:
The patent performs computation operations directly on data while it resides in the memory array, eliminating the need to first transfer data to a separate processor. This preliminary action of computing in-place prevents the time loss associated with data transfer overhead while maintaining high computation speed.
Solution Approach 2:
The patent introduces control circuits as intermediaries that manage MAC operations within the memory array. These control circuits enable direct computation on stored data without requiring physical data movement to external processors, thereby reducing compute time while maintaining productivity.
3Loss of energy
If bit toggling is minimized in the Compute-in-Memory system, then power consumption decreases, but the ability to process diverse data patterns may be limited
Solution Approach 1:
The patent applies local quality by enabling selective MAC operations only at specific memory locations and time cycles where computation is actually needed. This localized approach minimizes unnecessary bit toggling and power consumption while maintaining the ability to process diverse data patterns through targeted computation rather than universal processing.
Solution Approach 2:
The patent implements periodic action through time-multiplexed MAC operations where computation is performed in discrete cycles rather than continuously. This periodic approach allows the system to minimize bit toggling by activating computation only when needed, reducing power consumption while maintaining versatility through scheduled processing of different data patterns.
Data Source
AI summary
An integrated circuit includes a first logic gate configured to receive a first input signal and a second input signal, and generate a first control signal based on a first bit of first input signal and a first bit of the second input signal obtained in a current cycle. The integrated circuit includes a first backup storage component configured to store a second bit of the first input signal and a second bit of the second input signal obtained in a previous cycle. The integrated circuit includes a plurality of first macros each configured to selectively compute, based on the first control signal, a first multiply-accumulate (MAC) value for the first bit of the first input signal and the first bit of the second input signal.