Circuit Board Cavity Formation via Insulating Layer Mediator
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Solution Overview
Problem
The existing methods for manufacturing circuit board structures with cavities limit layout flexibility due to the direct formation of alignment copper layers on the core layer, restricting design possibilities during subsequent laser ablation processes.
Innovation Solution
A manufacturing method where a laser resisting layer is formed on an insulating material layer instead of the inner circuit structure, allowing for the creation of cavities through laser ablation without affecting the core layer's circuit layout, thereby enhancing layout flexibility by forming the laser resisting layer on the insulating material layer instead of the inner circuit structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If an alignment copper layer is directly formed on the core layer of the inner circuit layer, then the laser ablation process can be facilitated with proper alignment and laser resistance, but the circuit layout of the core layer is limited, reducing layout flexibility
Solution Approach 1:
The patent introduces an insulating material layer as an intermediary between the core layer and the laser resisting layer. This mediator allows the laser resisting layer to be formed without direct contact with the core layer circuit patterns, thus maintaining layout flexibility while still providing the necessary laser ablation alignment and resistance functions. The insulating material layer acts as a buffer that decouples the constraints of laser processing from the circuit design freedom.
2Reliability
If an alignment copper layer is formed on the core layer to serve as laser resisting layer, then laser ablation can be performed with proper alignment, but the circuit layout is constrained by the need to maintain copper layer integrity
Solution Approach 1:
The patent segments the laser resisting function from the core layer circuit structure by placing it on a separate insulating material layer. This segmentation allows the laser resisting layer to be optimized for its specific function without constraining the core layer circuit layout. The insulating material layer and laser resisting layer form a separate functional module that can be independently designed and adjusted.
3Ease of manufacture
If the laser resisting layer is formed directly on the inner circuit structure, then proper laser ablation protection is provided, but the design space for circuit layout is reduced
Solution Approach 1:
The patent moves the laser resisting layer from the planar dimension (directly on the core layer) to a vertical dimension (on top of the insulating material layer). This dimensional transition allows the laser resisting layer to provide its protective function without occupying valuable planar layout space on the core layer, thus increasing the available area for circuit design while maintaining ease of manufacture for laser ablation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of cavities that expose the core layer's surface without impacting the circuit layout, providing increased design flexibility and larger layout space for circuit designing.
Implementation Method 1
a laser resisting layer is formed on at least a portion of the insulating material layer
Implementation Method 2
A laser ablation process is performed on the first build-up circuit structure to irradiate a laser beam on the laser resisting layer so as to remove a portion of the first build-up circuit structure and the release layer
Data Source
AI summary
A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.