Circuit Board Conductive Post Seed Layer Impedance Control
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Solution Overview
Problem
Circuit boards face signal loss due to impedance mismatching between elements, leading to suboptimal signal transmission quality as electronic devices increasingly require high-frequency current handling.
Innovation Solution
A circuit board design featuring a first and second circuit layer with a conductive post directly connected to both layers, where the seed layers only cover the pads and not the conductive post, reducing impedance changes and interfaces, and a manufacturing method that forms these layers with specific masking and deposition processes to ensure direct contact and minimal impedance mismatch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If seed layers are formed on the sidewall of the conductive post, then adhesion and coverage are improved, but impedance mismatching increases and signal transmission quality deteriorates
Solution Approach 1:
The patent extracts the seed layer from the conductive post sidewall region, limiting its coverage to only the pad surfaces. This removal of the seed layer from the vertical sidewall eliminates the impedance mismatching problem while maintaining sufficient adhesion through controlled coverage on the horizontal pad surfaces only.
Solution Approach 2:
The patent applies different structural characteristics to different regions: the seed layer is present on pad surfaces to ensure adhesion, but absent on the conductive post sidewall to maintain signal integrity. This localized differentiation optimizes both adhesion and impedance characteristics in their respective regions.
2Adaptability or versatility
If multiple interfaces are created between pads and conductive posts, then connection flexibility is improved, but signal loss increases due to impedance changes
Solution Approach 1:
The patent merges the pad and conductive post into a more integrated structure by eliminating the seed layer interface on the sidewall. The direct transition from pad to conductive post without an intermediate seed layer reduces the number of interfaces, thereby minimizing signal loss while maintaining connection flexibility through the embedded structure.
3Object-affected harmful factors
If the conductive post is fully surrounded by dielectric layer, then insulation is improved, but direct contact between dielectric and conductive post is reduced
Solution Approach 1:
The patent applies different dielectric layer configurations to different regions: the dielectric layer provides full surrounding insulation for the conductive post in most areas, but creates direct contact regions where the dielectric layer is absent or reduced, allowing controlled interaction between the dielectric and conductive post for optimal signal transmission.
Data Source
AI summary
The present disclosure provides a circuit board and its manufacturing method. The circuit board includes a first circuit layer, a first conductive post, and a second circuit layer. The first circuit layer includes a first pad and a first seed layer covering a sidewall of the first pad. The first conductive post is on the first pad and directly connected to the first pad. The second circuit layer includes a second pad and a second seed layer covering a sidewall of the second pad. The second pad is on a first connecting end of the first conductive post. The first connecting end is embedded in the second pad, and the second pad is connected to and directly contacts the first connecting end. The first seed layer and the second seed layer do not extend on a sidewall of the first conductive post.