Circuit Board Metal Layer Alignment via Dielectric Reference
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Solution Overview
Problem
The existing 3D trench technology for circuit boards, used in 5G networks, faces misalignment issues between different portions of signal wires due to variations in photolithography alignment, leading to inefficiencies in reducing loss and noise, and generating unnecessary parasitic capacitance and inductance.
Innovation Solution
A manufacturing method for circuit boards that involves forming a substrate with a first metal layer, patterned openings, and dielectric layers, where a thicker third metal layer is formed adjacent to a cured dielectric layer, with electroplating and photolithography processes ensuring precise alignment and different dielectric constants for improved design flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If two separate photolithography processes are used to form the first portion and second portion of the signal wire, then the signal wire can have different thicknesses in different portions, but misalignment occurs between the two portions due to photolithography alignment variations
Solution Approach 1:
The first dielectric layer is formed and cured on the first metal layer before forming the second metal layer. This preliminary formation of the dielectric layer establishes a stable reference structure that prevents misalignment when subsequent metal layers are formed, as the dielectric layer acts as a positioning基准 that ensures accurate alignment of the thicker second portion with the first portion.
2Loss of energy
If the second portion of the signal wire is formed with greater thickness to reduce loss and noise, then impedance matching improves, but parasitic capacitance and inductance increase due to misalignment
Solution Approach 1:
By forming and curing the first dielectric layer before creating the second metal layer, the patent ensures that the thicker second portion aligns precisely with the first portion. This preliminary dielectric layer formation eliminates misalignment-induced parasitic effects while preserving the impedance matching benefits of variable thickness design.
3Manufacturing precision
If multiple metal layers with different thicknesses are formed on the same current wire, then impedance matching is improved, but the manufacturing process complexity increases
Solution Approach 1:
The patent forms the first dielectric layer and cures it via photolithography before forming subsequent metal layers. This preliminary dielectric layer creation serves as a reference structure that simplifies the alignment process for multiple metal layers of different thicknesses, making the complex multi-layer manufacturing process more controllable and precise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method prevents misalignment between metal layers, enhances signal efficiency by reducing loss and noise, and allows for more design freedom due to varying dielectric constants, resulting in improved impedance matching and reduced parasitic effects.
Implementation Method 1
photosensitizing the first dielectric layer to cure the first dielectric layer
Implementation Method 2
the first metal layer is used as a seed layer, and the second metal layer is formed by electroplating
Data Source
AI summary
A manufacturing method for a circuit board and a circuit board are provided. The method includes steps: providing a substrate having a first metal layer; forming a patterned first opening on the first metal layer to expose the substrate; forming a patterned first dielectric layer on the substrate, the first dielectric layer is made of a photosensitive dielectric material and covers the first opening; photosensitizing the first dielectric layer to cure the first dielectric layer; forming a patterned second metal layer on the first metal layer; forming a patterned third metal layer on the second metal layer, and the third metal layer being adjacent to the first dielectric layer; removing a portion of the first metal layer not covered by the second metal layer; and forming a second dielectric layer on the substrate. A thickness of the third metal layer is greater than a thickness of the second metal layer.