Circuit Board Via Geometry for Fine-Via Dimensional Control
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Solution Overview
Problem
Conventional circuit boards face challenges in forming fine vias due to expansion during the desmear process, leading to difficulties in miniaturizing via holes and achieving uniform surface roughness.
Innovation Solution
A method involving laminating a metal layer on the insulating layer in a B-stage state to impart surface roughness, followed by curing in a C-stage state and forming vias in this state to minimize size expansion and ensure uniform surface roughness, using ABF as the insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a desmear process is performed to increase adhesion between the chemical copper plating layer and the insulating layer, then adhesion is improved, but the via hole expands and it becomes difficult to form fine vias
Solution Approach 1:
The patent changes the physical state parameter of the insulating layer from B-stage (semi-cured) to C-stage (fully cured) before performing the desmear process. This parameter change causes the via hole expansion to be minimized while still achieving adequate adhesion, as the fully cured resin structure is more stable and less prone to swelling during desmearing.
2Manufacturing precision
If the insulating layer is cured in a C-stage state before forming vias, then via hole size expansion is minimized, but the surface roughness uniformity becomes challenging
Solution Approach 1:
The patent performs the desmear process as a preliminary action before via hole formation in the C-stage insulating layer. By roughening the surface in advance, the subsequent via formation process can proceed with minimal size variation, and the pre-established roughness pattern remains uniform across the surface.
3Strength
If the insulating layer is in a B-stage state during desmear process, then adhesion is improved, but the via hole size varies significantly
Solution Approach 1:
The patent changes the curing state parameter from B-stage to C-stage for the insulating layer during the desmear process. This parameter change stabilizes the resin structure, preventing excessive swelling and maintaining consistent via hole dimensions while still achieving sufficient adhesion through the desmear-induced surface roughness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of fine vias with minimal size deviation and reduced surface roughness variation, enhancing the precision and performance of circuit boards.
Implementation Method 1
laminating a metal layer on the insulating layer in a B-stage state to impart surface roughness
Implementation Method 2
curing in a C-stage state to minimize size expansion
Data Source
AI summary
A circuit board according to an embodiment includes an insulating layer; and a via formed in the insulating layer; wherein a width of an upper surface of the via is greater than a width of a lower surface of the via, and wherein the width of the lower surface of the via is 75% to 95% of the width of the upper surface of the via.