Circuit Carrier Fine Redistribution Bonding for High-Density Packaging

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Solution Overview

Problem

The challenge lies in simplifying the manufacturing process of circuit boards with high-density circuit layers while improving production yields and reducing signal loss, particularly in the context of high-speed, compact electronic products.

Innovation Solution

A circuit carrier design featuring a substrate with a first and second build-up circuit structure, a fine redistribution structure, and conductive through holes, where the fine redistribution structure is directly attached to the first build-up structure with narrower line widths and spacings, eliminating the need for intermediate connection structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a multilayer circuit structure is formed by combining copper foil and PrePreg into build-up layer structures and stacking them via repeated lamination, then high circuit density and reduced circuit spacing are achieved, but the manufacturing process becomes complex and production yield decreases

Engineering Contradiction:
Improvecircuit densityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The circuit board is divided into distinct functional layers: a core layer providing structural support, build-up layer structures containing circuit patterns, and a fine redistribution structure with finer line widths. This segmentation allows each layer to be optimized independently for its specific function while simplifying the overall manufacturing process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a vertical dimension by stacking multiple build-up layer structures on the core layer, creating a three-dimensional multilayer circuit structure. This allows high circuit density to be achieved without increasing planar area, thereby reducing circuit spacing in the horizontal dimension while maintaining manufacturing simplicity through standardized vertical stacking processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If the line width and line spacing of the fine redistribution structure are made smaller than the build-up circuit structure, then module density is enhanced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvemodule densityVSAvoidline width and line spacing precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent applies different line width and line spacing specifications to different regions of the circuit board. The fine redistribution structure uses narrower lines and smaller spacing in specific localized areas where high density is required, while the build-up layer structures use wider lines and larger spacing. This local differentiation allows high module density to be achieved without uniformly increasing manufacturing precision requirements across the entire board.

Inventive Principle:
Principle #3Local quality

3Reliability

If conductive through holes are used to electrically connect different layers, then electrical connectivity is improved, but signal loss increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidsignal loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent introduces an intermediary dielectric material filling the conductive through holes. This dielectric material acts as a mediator between the conductive elements of different layers, providing electrical connectivity while also serving as a signal transmission medium that reduces signal loss by optimizing the electromagnetic field distribution within the through holes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250227857A1Manufacturing method of circuit carrier
Publication Date: 2025.07.10 UNIMICRON TECH CORP
  • US20250227857A1 patent drawing
  • US20250227857A1 patent drawing
  • US20250227857A1 patent drawing

AI summary

A manufacturing method of a circuit carrier includes the following. A fine redistribution structure is formed on a temporary substrate. A build-up package substrate is provided. The build-up package substrate includes a substrate, a first build-up circuit structure, and a second build-up circuit structure. The first build-up circuit structure is disposed on a top surface of the substrate. The second build-up circuit structure is disposed on a bottom surface of the substrate. The fine redistribution structure is bonded on the build-up package substrate. The fine redistribution structure is directly attached on the first build-up circuit structure. A line width and a line spacing of the fine redistribution structure are smaller than a line width and a line spacing of the first build-up circuit structure. At least one conductive through hole is formed to penetrate the fine redistribution structure and a portion of the first build-up circuit structure.