Circuit Fingerprint Verification Across Manufacturing Stages

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Solution Overview

Problem

Manufactured components can be compromised by malicious actors during the production process, making it difficult to detect and remedy security breaches, which can lead to compromised hardware and systems.

Innovation Solution

A method and apparatus for testing circuit elements at multiple manufacturing stages using a circuit verifier that receives an attested fingerprint, transmits test inputs, compares test outputs to expected outputs, and generates an attestation result, ensuring component authenticity through cryptographic systems and secure computing modules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional manufacturing processes are used without verification, then production efficiency is maintained, but security of hardware is compromised due to potential corruption by malicious actors

Engineering Contradiction:
Improvesecurity of hardwareVSAvoidcomplexity of verification system
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by embedding verification circuitry and generating unique identifiers (fingerprints) during the manufacturing process itself, rather than adding verification later. The circuit verifier is integrated into the manufacturing flow, and test inputs/outputs are established before the component leaves the factory, preventing corruption rather than detecting it later.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses an intermediary approach by introducing a circuit verifier as a mediator between the manufacturer and the end user. This verifier contains the reference fingerprint and independently validates the component's integrity, acting as a trusted third party that neither the manufacturer nor the user can compromise alone.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If verification testing is implemented at manufacturing stages, then detection of corrupted components is improved, but manufacturing time is increased

Engineering Contradiction:
Improvedetection accuracy of corruptionVSAvoidmanufacturing cycle time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent merges the verification function with the existing manufacturing process by integrating the circuit verifier and fingerprint comparison logic directly into the production line. The verification steps are combined with standard manufacturing operations rather than being separate sequential steps, allowing parallel execution and reducing overall cycle time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements rapid verification by using pre-established fingerprints and simple comparison logic that can be executed quickly. The system skips complex analysis by relying on predetermined test inputs and outputs, allowing verification to occur in minimal time without compromising detection accuracy.

Inventive Principle:
Principle #21Skipping (Rushing through)

3Reliability

If cryptographic systems are integrated into circuit elements, then authenticity verification is enhanced, but manufacturing complexity increases

Engineering Contradiction:
Improveauthenticity verificationVSAvoidease of manufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies self-service by designing the circuit element to contain its own verification capabilities. The unique identifier and verification logic are embedded within the component itself, allowing it to perform self-verification without requiring external cryptographic infrastructure or complex manufacturing processes for key management.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11599098B2Apparatus and methods for testing circuit elements at one or more manufacturing stages
Publication Date: 2023.03.07 ARES TECHNOLOGIES INC
  • US11599098B2 patent drawing
  • US11599098B2 patent drawing
  • US11599098B2 patent drawing

AI summary

A method for testing circuit elements at one or more manufacturing stages comprising receiving, at a circuit verifier a fingerprint of at least a circuit element to be manufactured, wherein the fingerprint further comprises at least an expected output corresponding to at least a test input, transmitting, from the circuit verifier the at least a test input to the at least a circuit element, receiving, at the circuit verifier at least a test output from the at least a circuit element, and comparing, by the circuit verifier the at least a test output to the at least an expected output of the fingerprint of the at least a circuit element.