Digital Circuit Testing TRIZ Cases
- Power Supply Glitch Detection Using Filtered Voltage Components
Filtered high-pass and low-pass voltage signals detect short power supply glitches with lower power use and higher sensitivity.
- Differential Test Circuits for EMI-Resistant Low Current Measurement
Two identical test circuits cancel EMI through differential processing, enabling accurate low current measurement without longer test time.
- TAP Scan Control for At-Speed Capture and Update
Additional CMD and router circuitry let a TAP hold ShiftDR while issuing at-speed capture and update signals without dead states.
- Bi-Directional Coupler Termination Switching for Low-Loss Isolation
Switchable termination loads keep unused test ports matched, preserving directivity and isolation while avoiding extra insertion loss.
- Probe Pin Thermocouple Layout for Localized Wafer Temperature Testing
Thermocouples placed between probe pins use the Peltier effect to locally heat or cool dense wafer pads without testing the entire wafer.
- Vehicle Control Timing Adjustment for Jitter-Tolerant Scheduling
Execution timing is adjusted by jitter tolerance to suppress high-priority task interference and stabilize vehicle control with lower scheduling overhead.
- On-Chip Clocked IC Testing for Pre-Packaging Speed Screening
An on-chip clock and test circuit lets ICs be screened before packaging at selectable high speeds, improving defect detection and binning.
- Ring Oscillator Layout for Decoupling BTI and HCI Stress
Alternating inverter power connections isolate BTI and HCI in ring oscillators through frequency-shift measurement, improving failure-mode prediction.
- Battery Module Redistribution for Uniform Grid Storage Output
Selective module redistribution matches battery state of health to preserve grid storage capacity, avoid waste, and keep power output uniform.
- ECU Test Sequencing Using Neural Network Signal Ranking
Neural network pruning ranks CAN bus signal importance to sequence ECU tests, cutting test time and compute while finding faults earlier.
- Power System Component Emulation for Stable Hardware-in-the-Loop Testing
Interconnected power amplifiers and converter emulators improve test fidelity and numerical stability for realistic power system component testing.
- Protection Circuit for Clamped Inductive Load Testing
Automatic transistor cutoff and voltage clamping divert energy fast in high-current DUT tests, protecting wafers and test hardware.
- BIST Clock Segmentation to Prevent False Test Pass Signals
A split-clock BIST circuit holds the test result high when clock failure causes test omission, preventing false pass indications.