Protection Circuit for Clamped Inductive Load Testing
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Solution Overview
Problem
Conventional dynamic test methodologies for power semiconductor devices face challenges in quickly diverting energy during high current clamped inductive load tests, leading to potential damage to wafers and test hardware due to slow reaction times of existing energy diversion techniques.
Innovation Solution
An electronic test equipment apparatus with a protection circuit that automatically disconnects the power terminal from the device under test after a predetermined delay, using series-connected power transistors to ensure safe energy diversion regardless of test outcomes, and a voltage clamp circuit with linear MOSFETs for continuous voltage adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional parallel crowbar circuit is used for energy diversion, then some current bypass is achieved, but current still flows through DUT causing damage and delay of several microseconds occurs before activation
Solution Approach 1:
The protection circuit is pre-configured and activated before the inductive load test begins. The circuit includes pre-charged capacitors and pre-positioned switches that are ready to immediately divert current upon detection of a failed device, eliminating the several microsecond delay inherent in conventional crowbar circuits that must first detect and then activate.
Solution Approach 2:
The invention introduces an intermediary protection circuit between the power source and the DUT that actively monitors and controls current flow. This intermediary circuit uses operational amplifiers and transistors to detect device failures and rapidly redirect current through alternative paths, preventing both time delay and incomplete current diversion.
2Reliability
If MOSFET-based wafer probe current limiters are used, then current limiting is achieved, but reaction time is relatively slow and large amount of heat is generated
Solution Approach 1:
The invention replaces the passive MOSFET-based current limiting mechanism with an active electronic protection circuit that uses operational amplifiers and fast-switching transistors. This substitution enables precise current control through electronic feedback rather than relying on the thermal and electrical characteristics of MOSFETs, thereby reducing heat generation and improving reaction time.
Solution Approach 2:
The protection circuit dynamically adjusts current parameters by varying the switching timing and duty cycle of the transistors based on real-time device performance detection. This allows the circuit to limit current to safe levels while minimizing power dissipation and heat generation, unlike fixed-parameter MOSFET limiters that operate in linear region and generate excessive heat.
3Manufacturing precision
If inductive load test is performed with high current and high voltage, then device defects can be excited, but energy released can cause holes in wafer, damage good dies and damage test hardware
Solution Approach 1:
The protection circuit is designed to detect device failures and divert current before the inductive load can release damaging energy. By monitoring device characteristics during the charging phase and preparing the diversion path in advance, the circuit prevents the accumulation of excessive energy that would otherwise cause holes in the wafer or damage to good dies and test hardware when the inductor is disconnected.
Solution Approach 2:
The invention converts the potentially harmful inductive kickback energy into a beneficial diagnostic signal. When a device fails, the protection circuit detects the anomaly and redirects the energy flow to safely discharge the inductor through a controlled path, transforming what would be destructive energy into useful information about device performance while protecting the test system.
Data Source
AI summary
An electronic test equipment apparatus includes a power terminal configured to receive power, an interface for a device under test (DUT), at least one power transistor connected in series between the power terminal and the interface for the DUT, and a protection circuit. The protection circuit is configured to: switch on the at least one power transistor, to electrically connect the power terminal to the DUT through the interface as part of a test routine; and subsequently automatically switch off the at least one power transistor after a predetermined delay, to electrically disconnect the power terminal from the DUT regardless of whether the DUT passes or fails the test routine. A voltage clamp circuit for electronic test equipment and corresponding methods of testing devices using such electronic test equipment are also described.


