Circuit Simulator Using Delta Matrix Updates for Nanometer Design
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Solution Overview
Problem
Conventional circuit simulation methods, such as SPICE and Fast SPICE, face challenges in handling large matrix sizes and nanometer designs, leading to inefficiencies in simulation time and capacity, particularly when dealing with complex integrated circuits and new semiconductor technologies.
Innovation Solution
The proposed solution employs a divide-and-conquer methodology using a universal device (UD) tree structure and matrix decomposition techniques, such as the Schur complement method, to parallelize the LU decomposition of matrices, enabling efficient simulation by identifying and updating delta matrices and storing current states, and utilizing GPUs for processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional SPICE simulation methods are used to simulate whole systems, then simulation accuracy is maintained, but simulation time becomes excessively long and capacity is limited for large-scale circuits
Solution Approach 1:
The circuit is divided into multiple sub-circuits using a hierarchical structure. The top-level circuit is segmented into functional blocks, each simulated independently at a lower level. This segmentation allows the simulation to handle large-scale circuits by breaking them into manageable pieces, significantly increasing simulation capacity while reducing overall simulation time through parallel processing of independent sub-circuits.
2Measurement precision
If detailed transistor-level simulation is performed to analyze nanometer effects, then simulation accuracy for nanometer designs is improved, but computational complexity and simulation time increase significantly
Solution Approach 1:
Different simulation detail levels are applied to different parts of the circuit based on their importance and impact on nanometer effects. Critical sub-circuits that directly influence nanometer phenomena are simulated with high detail, while less critical areas use coarser models. This local quality approach maintains simulation accuracy for key nanometer effects while reducing overall computational complexity.
Solution Approach 2:
Instead of performing full detailed simulation across the entire circuit, the method applies detailed transistor-level simulation only to specific sub-circuits where nanometer effects are most pronounced. This partial action approach achieves sufficient accuracy for nanometer design analysis without the prohibitive computational cost of complete detailed simulation.
3Quantity of substance
If the matrix size is increased to accommodate more circuit components, then simulation completeness is improved, but the difficulty of solving the matrix equations increases
Solution Approach 1:
The large system matrix is partitioned into smaller sub-matrices corresponding to different sub-circuits. Each sub-matrix is solved independently at lower hierarchical levels, and results are aggregated upward. This segmentation transforms an intractable large-scale matrix problem into multiple smaller, more manageable matrix solutions, reducing solving difficulty while maintaining completeness.
Solution Approach 2:
The simulation problem is transformed from a single large 2D matrix solution into a multi-dimensional hierarchical structure. By organizing the matrix solution across multiple hierarchical levels (top-level circuit → intermediate sub-circuits → bottom-level components), the method adds a hierarchical dimension that simplifies the solving process while accommodating a larger number of circuit components.
Data Source
AI summary
Method and system are disclosed for simulating a circuit. The method includes representing a circuit using a matrix that represents a set of linear equations to be solved, identifying a delta matrix, which is a subset of the matrix that changed states from a previous time step to a current time step, computing an update of the delta matrix using a matrix decomposition approach, generating a current state of the matrix using a previous state of the matrix and the update of the delta matrix, and storing the current state of the matrix in a memory device.