Class-D Amplifier Deglitching Circuit for Comparator Spike Noise
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Solution Overview
Problem
Conventional class-D amplifiers experience glitches at the output of the comparator due to spikes in the power supply rail or ground references, leading to audible distortion and increased power dissipation, which are typically addressed using additional high-frequency clocks and low-pass filters that introduce complexity and potential distortion.
Innovation Solution
A deglitching circuit with digital logic is introduced between the comparator and drive circuit, utilizing a clock signal of the same frequency as the switching frequency to remove glitches without additional high-frequency clocks or low-pass filters, thereby simplifying the circuit and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional class-D amplifiers use additional high-frequency clocks and low-pass filters to remove glitches, then glitch removal is achieved, but circuit complexity increases and potential distortion is introduced
Solution Approach 1:
The patent extracts and removes the problematic additional high-frequency clocks and low-pass filters from the conventional circuit design. By eliminating these components, the invention achieves glitch removal through a simpler deglitching circuit that processes only the necessary frequency components, thereby reducing circuit complexity while maintaining reliability.
Solution Approach 2:
The patent introduces a deglitching circuit as an intermediary component between the comparator and drive circuit. This intermediary processes the PWM signal to remove glitches caused by power supply spikes without requiring the complex combination of high-frequency clocks and low-pass filters, thus achieving glitch removal with reduced circuit complexity.
2Reliability
If conventional class-D amplifiers use additional high-frequency clocks and low-pass filters to remove glitches, then glitch removal is achieved, but power consumption increases
Solution Approach 1:
The patent extracts and eliminates the power-consuming additional high-frequency clocks and low-pass filters from the conventional design. The simplified deglitching circuit requires less power while achieving the same glitch removal function, thereby reducing overall power consumption of the amplifier system.
3Device complexity
If a deglitching circuit with digital logic is introduced between the comparator and drive circuit, then circuit complexity is reduced and power consumption decreases, but glitch removal effectiveness must be maintained
Solution Approach 1:
The patent changes the operational parameters of the deglitching circuit, specifically using a clock signal with the same frequency as the switching frequency rather than additional high-frequency clocks. This parameter change simplifies the circuit while maintaining effective glitch removal, as the deglitching logic is optimized to process signals at the fundamental switching frequency where glitches occur.
Data Source
AI summary
In an embodiment, a class-D amplifier includes an input terminal configured to receive an input signal; a comparator having an input coupled to the input terminal; a deglitching circuit having an input coupled to an output of the comparator; and a driving circuit having an input coupled to an output of the deglitching circuit. The deglitching circuit includes a logic circuit coupled between the input of the deglitching circuit and the output of the deglitching circuit. The logic circuit is configured to receive a clock signal having the same frequency as the switching frequency of the class-D amplifier.