Clean Data Strobe Signal Circuit for LPDDR Read Interface
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Solution Overview
Problem
Existing memory systems face challenges in generating a clean data strobe signal without delay control circuits or training operations, particularly in low-power double data rate (LPDDR) memory systems, where differential data strobe signals can result in dirty signals due to ground termination type on-die termination operations, leading to unknown states and errors in data reception.
Innovation Solution
A clean data strobe signal generating circuit is developed for read interface devices, which includes receivers to process differential data strobe signals, a gate signal generator to synchronize signals, and logic gates to produce a clean data strobe signal without the need for gate training or delay control circuits, ensuring accurate data reception by masking unknown sections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ground termination type on-die termination operation is performed in differential receiver, then signal termination is improved, but dirty signal of tri-state condition is outputted
Solution Approach 1:
The patent extracts and removes the harmful tri-state sections from the data strobe signal by using a gate signal to mask only the valid signal portions, separating the useful signal from the dirty tri-state conditions generated by ground termination operation
Solution Approach 2:
The patent introduces a gate signal as an intermediary element that controls the passage of the data strobe signal through logic gates, allowing only clean valid portions to pass while blocking the dirty tri-state sections
2Reliability
If gate training operation is performed to synchronize data strobe signal, then signal synchronization is improved, but device complexity and operation time increase
Solution Approach 1:
The patent implements self-service by having the data strobe signal itself generate the gate signal through signal processing circuits, eliminating the need for external gate training operations and complex training logic
Solution Approach 2:
The patent performs preliminary action by pre-generating the gate signal from the data strobe signal before the main data reception operation, so that synchronization is already established when data arrives, eliminating the need for runtime training
3Manufacturing precision
If delay control circuit is used to adjust data strobe signal timing, then timing accuracy is improved, but device complexity increases
Solution Approach 1:
The patent merges the timing control function into the existing signal processing path by using the same signal processing circuits to generate both the data strobe signal and its corresponding gate signal, eliminating the need for separate delay control circuits
Data Source
AI summary
A clean data strobe signal generating circuit in a read interface device includes receivers configured to output first and second single ended data strobe signals. In the circuit, a gate signal generating unit is configured to generate a data strobe gate signal synchronized with the first single ended data strobe signal using the first and second single ended data strobe signals and a memory gate signal of which the pulse width varies in accordance with a burst length after termination of a read latency. The gating unit is configured to generate a clean data strobe signal using the first single ended data strobe signal and the data strobe gate signal.