Window-Constrained Issue Logic for Vector Load Deadlock Prevention
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Solution Overview
Problem
In processors with out-of-order execution, there is a risk of deadlock in vector data transfer due to out-of-order execution of vector load instructions, leading to inefficiencies and potential stalling in the vector domain.
Innovation Solution
Implementing window-constrained issue logic in the load/store unit to define a clearance window within the issue queue, ensuring that younger vector load instructions are blocked from executing out of order if they would prevent the oldest load instruction from allocating space in the vector transfer buffer, thereby preventing deadlock while allowing out-of-order execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vector load instructions are allowed to execute out of order in the load/store unit, then execution efficiency is improved, but deadlock may occur in the vector transfer buffer
Solution Approach 1:
The patent applies preliminary action by checking whether the oldest vector load instruction has allocated space in the vector transfer buffer before allowing younger vector load instructions to execute out of order. This pre-check prevents deadlock conditions from occurring in the first place, while still permitting out-of-order execution to improve efficiency when safe to do so.
Solution Approach 2:
The patent implements dynamic control of instruction execution order based on the state of the vector transfer buffer. The issue logic dynamically determines whether out-of-order execution is permitted by checking buffer allocation status, allowing the system to adapt between in-order and out-of-order execution modes to balance efficiency and deadlock prevention.
2Reliability
If younger vector load instructions are blocked from executing out of order, then deadlock is prevented, but execution flexibility is reduced
Solution Approach 1:
The patent changes the control parameter from a fixed in-order execution policy to a dynamic policy based on buffer allocation state. When the oldest instruction has allocated buffer space, the parameter allows out-of-order execution; when it has not, in-order execution is enforced. This parameter change maintains flexibility while preventing deadlock.
3Area of stationary object
If a shared vector transfer buffer is used between scalar and vector domains, then chip area and power are saved, but resource contention and potential stalling increase
Solution Approach 1:
The patent implements feedback control where the issue logic monitors the allocation state of the shared vector transfer buffer and uses this information to control which vector load instructions are permitted to execute. This feedback mechanism ensures that out-of-order execution does not cause resource contention or stalling in the shared buffer, maintaining throughput while using a compact shared design.
Data Source
AI summary
A window-based constraint on issue order can be applied where a shared resource (e.g., a transfer buffer for load data) is allocated out-of-order by a first unit in a processor (e.g., a load/store unit) and freed in-order by a second unit in the processor (e.g., a unit that moves data out of the transfer buffer). The first unit can have a first issue queue and issue logic that imposes a constraint that an instruction that allocates the shared resource is only ready to issue if it is within or younger than a clearance window defined within the first issue queue, where the clearance window is defined to allow at least some out-of-order issue of instructions that allocate the shared resource.