Clock Alignment Module for Warm Reset Isolation
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Solution Overview
Problem
Integrated circuit (IC) systems face challenges in maintaining phase alignment of clocks during warm resets, where certain subcircuits may become misaligned due to the switch from a reference clock to a bypass clock, leading to potential system performance issues.
Innovation Solution
The implementation of a clock alignment module that receives a reference clock signal and generates an alignment signal based on the clock frequencies of subcircuits, allowing it to switch between clock signals and unblock the clock signal when alignment is achieved, ensuring synchronized operations across the IC system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a clock bypass signal is used to switch subcircuits from reference clock to second clock during warm reset, then reset isolation can be achieved, but clock phase alignment is lost
Solution Approach 1:
The system performs preliminary actions by generating alignment signals before the clock switch occurs, and blocks the clock signal in advance. The alignment signal is generated based on the second clock frequency, and the clock signal is blocked until alignment is achieved, preventing misalignment issues before they can affect system operation.
Solution Approach 2:
A clock alignment module is introduced as an intermediary component between the clock switching mechanism and the subcircuits. This module generates alignment signals and controls clock signal blocking to ensure that the transition between reference clock and second clock maintains phase alignment, mediating between the need for reset isolation and clock synchronization.
2Stability of the object's composition
If clock signal is continuously blocked during clock switching, then phase alignment can be maintained, but system productivity decreases
Solution Approach 1:
The clock signal blocking is implemented as a periodic action rather than continuous blocking. The alignment signal is generated periodically based on the second clock frequency, and the clock signal is blocked only during the specific periods when alignment transitions are needed, allowing system operation to continue during normal periods.
Solution Approach 2:
The system performs preliminary alignment signal generation and clock blocking only when needed for transitions, rather than continuously. This allows the system to maintain productivity by keeping the clock signal unblocked during normal operation while ensuring alignment is established before switching between clock sources.
Data Source
AI summary
An electronic device comprising one or more subcircuits configured to receive a clock signal, the clock signal configured to switch from a reference clock signal to a second clock signal based on a clock bypass signal, a timer configured to receive the reference clock signal and output an alignment signal based on the reference clock signal, wherein a frequency of the alignment signal is determined based on clock frequencies of the one or more subcircuits; a clock alignment module coupled to the timer and the one or more subcircuits and configured to receive the clock bypass signal, determine that the clock bypass signal has changed to switch the one or more subcircuits to the reference clock signal from the second clock signal, block the clock signal from being received by the one or more subcircuits, receive the alignment signal, and unblock the clock signal based on the alignment signal.