Clock-Domain Signal Checking Using Constant-Step Number Sequences
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Solution Overview
Problem
Electronic devices with circuits operating in different clock domains often struggle to ensure that successive number signals received are accurate and uncorrupted, particularly when these signals are transmitted across different frequency clock signals.
Innovation Solution
A device comprising multiple clock circuits with different frequencies, which receives signals of successive numbers separated by a constant value from a common source. This device includes a generator circuit that produces a signal with successive numbers separated by a constant value, and a circuit that synchronizes this signal across different clock domains, ensuring integrity through error detection mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If signals are transmitted across different clock domains with different frequencies, then signal transmission flexibility and device functionality are improved, but signal integrity and accuracy deteriorate due to potential corruption and synchronization issues
Solution Approach 1:
The patent implements a feedback mechanism where the receiving circuit monitors incoming successive number signals and generates error detection signals when corruption is detected. The system uses the constant separation value between successive numbers as a reference to verify signal integrity, creating a closed-loop feedback system that detects and flags transmission errors across clock domain boundaries.
Solution Approach 2:
The patent introduces an intermediary verification mechanism that acts as a mediator between transmitting and receiving circuits across clock domains. This intermediary layer checks the consistency of successive number signals using the known constant separation value, serving as a buffer that validates signals before they are processed by the receiving circuit, thus protecting against corruption without requiring direct tight coupling between clock domains.
2Measurement precision
If error detection mechanisms are added to verify signal integrity across clock domains, then signal accuracy is improved, but device complexity increases
Solution Approach 1:
The receiving circuit performs self-verification by utilizing the inherent property of successive number signals (constant separation value) to detect errors. The circuit compares the actual separation between received successive numbers against the expected constant value, allowing the system to self-diagnose transmission errors without requiring external verification hardware or complex error correction codes.
Solution Approach 2:
The patent leverages the parameter of constant separation value between successive numbers as a verification key. By monitoring this parameter across clock domain transitions, the system detects signal corruption when the separation deviates from the expected constant value, providing a simple yet effective error detection mechanism that relies on parameter monitoring rather than complex verification logic.
Data Source
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AI summary
The present description relates to a device comprising a first circuit (102) configured to send, to at least a second circuit (104), a signal comprising numbers successively separated by a constant value, each second circuit (104) being in a clock domain different from the clock domain of the first circuit (102), the signal being sent, in each of the clock domains different from the clock domain of the first circuit (102), to a third circuit (108) configured to determine whether the successive numbers of the signal received by the second circuit (104) are separated by the constant value.