Differential Clock Duty Cycle Correction With Hybrid Current DAC
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Solution Overview
Problem
Conventional duty cycle correction circuits face challenges with non-linear step transfer functions, sub-threshold operation, and increased parasitic capacitance, which affect the range and resolution, leading to unpredictable duty cycle corrections and increased power consumption.
Innovation Solution
A differential clock duty cycle correction circuit with a hybrid current injector and tapered current digital-to-analog converter (DAC) is introduced, where the hybrid current injector is controlled by a portion of the n-bit DAC code, and the tapered current DAC provides a constant reference current to ensure linear step transfer functions and prevent sub-threshold operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional duty cycle correction circuits are used, then duty cycle correction is provided, but non-linear step transfer functions and sub-threshold operation occur leading to unpredictable corrections and increased power consumption
Solution Approach 1:
The n-bit DAC code is divided into two portions: a first portion (m bits) that controls the hybrid current injector directly, and a second portion (n-m bits) that controls the tapered current DAC. This segmentation allows the system to operate in different modes - digital control for fine adjustments and analog control for coarser adjustments - thereby achieving linear step transfer functions and avoiding sub-threshold operation
Solution Approach 2:
The patent employs a hybrid current injector that combines digital control (from the first portion of DAC code) and analog control (from the tapered current DAC driven by the second portion). This composite approach merges the advantages of both digital precision and analog linearity, eliminating the non-linear behavior and sub-threshold operation inherent in purely digital or purely analog implementations
2Reliability
If conventional duty cycle correction circuits are used, then correction is applied, but area and parasitic capacitance increase
Solution Approach 1:
By segmenting the DAC code into two portions and using them to control different parts of the hybrid current injector, the patent achieves accurate duty cycle correction with reduced circuit area. The segmented approach allows efficient use of circuit resources by activating only the necessary control paths for each correction level
Solution Approach 2:
The hybrid current injector serves multiple functions: it can operate in digital mode for fine-grained correction, in analog mode for coarser correction, and can adapt its operation based on the duty cycle error magnitude. This multi-functionality reduces the need for separate correction circuits, thereby reducing overall area while maintaining correction accuracy
3Measurement precision
If conventional duty cycle correction circuits are used, then correction is provided, but resolution and range are affected by non-linear operation
Solution Approach 1:
The segmentation of the DAC code enables the system to achieve high resolution through the first portion (m bits) while the second portion (n-m bits) controls the tapered current DAC to provide linear scaling. This segmentation resolves the contradiction by allowing precise digital control without the non-linearities that would otherwise limit resolution
Solution Approach 2:
The patent changes the operational parameters of the current injector by switching between digital control (for high resolution) and analog control via the tapered current DAC (for linearity). By dynamically adjusting the control mode based on the required correction magnitude, the system maintains high resolution across the full range while avoiding non-linear operation
4Reliability
If conventional duty cycle correction circuits are used, then correction is applied, but power consumption increases due to sub-threshold operation
Solution Approach 1:
By segmenting the control approach into digital (first portion of DAC code) and analog (second portion controlling tapered current DAC) components, the patent avoids prolonged sub-threshold operation. The digital portion handles small corrections efficiently, while the analog portion handles larger corrections without entering the high-power sub-threshold region, thereby reducing overall power consumption while maintaining correction effectiveness
Data Source
AI summary
Embodiments of the disclosure provide a differential clock duty cycle correction (DCC) circuit, including: a hybrid current injector including current sources for generating a correction current, wherein the correction current is added to a clock signal of a first polarity at a first correction node and subtracted from a clock signal of an opposite polarity at a second correction node, and wherein a plurality of the current sources in the hybrid current injector are controlled by a first portion of a n-bit DAC code to generate the correction current; and a current DAC for receiving a second, different portion of the n-bit DAC code and for outputting a corresponding reference current to the current sources in the hybrid current injector, wherein the current sources generate the correction current in response to the reference current output by the current DAC for the second portion of the n-bit DAC code.