Clock Frequency Estimation Using Delayed Least-Squares Sampling

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Solution Overview

Problem

Existing clock frequency estimation methods suffer from high estimation errors due to measurement noise and require complex circuitry or significant processor time, with error reduction proportional to 1/N^2, and simpler methods introduce large errors.

Innovation Solution

Implement a least squares method using time measurements of clock cycles to estimate frequency, reducing estimation error to 1/N^3 by selectively sampling and comparing time measurements with previously made measurements, and using efficient accumulator architectures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If brute-force calculation of average clock period is used, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveclock frequency estimation accuracyVSAvoidcircuitry complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the measurement process into two distinct phases: a training phase where the system learns the relationship between counter values and clock periods, and an operation phase where pre-computed lookup tables are used for fast estimation. This segmentation allows the system to achieve high measurement precision through the training phase while maintaining low device complexity during operation by using simple table lookups instead of complex calculations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary calculations during a training phase to populate lookup tables with pre-computed clock period values. These tables are generated in advance using the formula T = (N - m) * Ts / m, where N is the number of sample clock cycles and m is the number of input clock cycles. During actual operation, the system simply retrieves values from these pre-computed tables, avoiding complex real-time calculations and reducing device complexity while maintaining high measurement precision.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If brute-force calculation of average clock period is used, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
Improveclock frequency estimation accuracyVSAvoidprocessor time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary calculations during a training phase to populate lookup tables with pre-computed clock period values. These tables are generated in advance using the formula T = (N - m) * Ts / m, where N is the number of sample clock cycles and m is the number of input clock cycles. During actual operation, the system simply retrieves values from these pre-computed tables, avoiding complex real-time calculations and reducing processor time consumption while maintaining high measurement precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a simplified copy of the complex calculation process by pre-computing and storing results in lookup tables. Instead of performing the full brute-force calculation T = (Σti)/N during operation, the system uses pre-computed values from tables that were generated in advance. This copying approach maintains measurement precision while dramatically reducing the processor time required for actual frequency estimation.

Inventive Principle:
Principle #26Copying

3Device complexity

If cycle-by-cycle frequency computation is used, then device complexity is reduced, but measurement precision deteriorates

Engineering Contradiction:
Improvecircuitry complexityVSAvoidclock frequency estimation accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent segments the measurement process into a training phase where accurate measurements establish the relationship between counter values and clock periods, and an operation phase where this learned relationship is applied through simple lookup tables. This segmentation allows the system to achieve low device complexity during operation while maintaining high measurement precision through the initial training phase that captures the true clock characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary measurements and calculations during a training phase to populate lookup tables with accurate clock period values. By pre-computing these values using the formula T = (N - m) * Ts / m based on actual measured data, the system captures the true clock characteristics in advance. During operation, simple table lookups maintain device complexity reduction while preserving measurement precision because the tables contain empirically derived accurate values.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12474385B2Apparatus and method for clock frequency estimation with delayed measurements
Publication Date: 2025.11.18 MICROCHIP TECHNOLOGY INC
  • US12474385B2 patent drawing
  • US12474385B2 patent drawing
  • US12474385B2 patent drawing

AI summary

An apparatus includes a clock signal input, a sampling circuit, and an estimation circuit. The clock signal input receives N time measurements. A time measurement denotes a respective portion of a given cycle of a clock signal. The sampling circuit is to generate a first sampled window based upon a first time measurement and a first previous time measurement received m time measurements earlier than the first time measurement. The sampling circuit is to generate a second sampled window based upon a second time measurement and a second previous time measurement received m time measurements earlier than the second time measurement. The estimation circuit is to estimate the frequency or period of the clock signal based upon the first sampled window and the second sampled window.