Clock Frequency Detection Circuit for Overclocking Attack Protection
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Solution Overview
Problem
Existing electronic devices are vulnerable to overclocking attacks, where attackers can transmit unauthorized data by providing an overclocked input clock signal, exceeding the platform firmware resilience mechanism's sampling frequency limits.
Innovation Solution
A data transmission protection device with an input clock signal detector and a control signal generator that compares the frequency of the input clock signal to a reference clock signal, generating a control signal to disable data access when the input clock signal exceeds a safety setting value, thereby preventing overclocking attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the platform firmware resilience mechanism limits the sampling clock frequency to prevent overclocking attacks, then the security against unauthorized data transmission is improved, but the data transmission speed and system performance deteriorate
Solution Approach 1:
The protection device dynamically adjusts the sampling clock frequency based on the input clock signal frequency. When overclocking is detected, the sampling clock frequency is reduced to prevent unauthorized data transmission. When normal operation is detected, the sampling clock frequency is maintained at its maximum to ensure high data transmission speed. This dynamic adjustment resolves the contradiction between security and performance.
Solution Approach 2:
The system changes the parameter of sampling clock frequency based on detected conditions. The protection device monitors the input clock signal frequency and adjusts the sampling clock frequency parameter accordingly - reducing it when overclocking is detected and maintaining it at high levels during normal operation, thus resolving the trade-off between security and transmission speed.
2Reliability
If the sampling clock frequency is limited to a fixed upper bound, then the protection against unauthorized data transmission is improved, but the ability to handle high-speed legitimate data transmission deteriorates
Solution Approach 1:
The protection device implements dynamic frequency adjustment where the sampling clock frequency is not fixed but adapts based on the input clock signal characteristics. During legitimate high-speed transmission, the system maintains high sampling frequency. During unauthorized overclocking attempts, the system reduces the frequency. This dynamic behavior provides both protection and adaptability.
Solution Approach 2:
The protection device uses feedback from the input clock signal frequency detection to control the sampling clock frequency. The system continuously monitors the input clock signal and adjusts the sampling clock frequency based on this feedback, enabling it to distinguish between legitimate high-speed transmission and unauthorized overclocking attempts, thus achieving both security and adaptability.
Data Source
AI summary
An electronic device and data transmission protection device thereof are provided. The data transmission protection device includes an input clock signal detector and a control signal generator. The input clock signal detector receives a reference clock signal, and detects a frequency of an input clock signal provided by a host end according to the reference clock signal, and frequencies of the reference clock signal and the input clock signal are different. The control signal generator enables a generated control signal when the frequency of the input clock signal is larger than a safety setting value. The control signal is used to disable the host end to perform a data accessing operation on a protected circuit.