Clock Gating Delay Compensation for Data Latch Timing
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Solution Overview
Problem
Existing information processing apparatuses require additional processes to adjust data latch timing when data received from an external device is delayed by one cycle or more with respect to the output clock, leading to potential data reception failures.
Innovation Solution
An information processing apparatus with a supply unit for clocking an external device, an instruction unit for transmitting a calibration pattern, a receiving unit for synchronized data, a control unit for clock gating, a storage unit for delay information, and a detection unit to adjust data latch timing based on detected cycle delays, allowing for automatic timing adjustments without additional processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clock gating is used to stop clock supply when data buffer is full, then data overflow is prevented, but data reception fails when delay of one cycle or more occurs
Solution Approach 1:
The system performs preliminary calibration by having the external device transmit a calibration pattern before normal data communication begins. The control unit detects the amount of delay by comparing the received calibration pattern with expected values and stores this delay information. This preliminary timing adjustment ensures that subsequent data reception does not require additional timing adjustment processes, preventing data latch failures while maintaining simple operation.
2Reliability
If additional process for adjusting data latch timing is implemented, then data reception reliability improves, but device complexity increases
Solution Approach 1:
The system enables self-adjustment of timing parameters through automatic detection of delay amounts during calibration. The control unit automatically detects the delay by comparing calibration patterns and stores the delay information, eliminating the need for manual timing adjustment processes. This self-service mechanism ensures reliable data reception while keeping the device operation simple and maintaining low complexity.
3Measurement precision
If calibration pattern transmission is performed, then timing accuracy improves, but data transfer time increases
Solution Approach 1:
The calibration pattern transmission is performed as a preliminary action before normal data communication begins. By conducting the timing detection and calibration in advance, the system ensures that accurate timing information is obtained without affecting the subsequent data transfer process. The calibration time is incurred only once during initialization, after which the system can operate efficiently without repeated calibration overhead.
Data Source
AI summary
If data received by the an information processing apparatus from an external device is delayed by one cycle or more with respect to a clock of the information processing apparatus, the information processing apparatus may require an additional process for adjusting a data latch timing.Delay information indicating a relationship between a calibration pattern to be received and an amount of cycle delay is stored in advance. Thus, the time required for detecting an amount of cycle delay, which is equivalent to the amount by which a signal for controlling a data latch mechanism in the information processing apparatus to stop its operation is delayed, can be reduced.