Signal Interface Using Clock-Line Data for Mixed Slave Circuits
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Solution Overview
Problem
In electronic devices, slave circuits with varying data volume requirements often receive either unused or insufficient information, leading to inefficient signal bandwidth and performance, and increasing power consumption when trying to adapt to high data volumes, which complicates hardware selection and design.
Innovation Solution
A signal interface system where main control data is transmitted through a data line and additional control data is transmitted through a clock line, allowing slave circuits to operate efficiently with different data volume requirements without increasing signal frequencies, thus maintaining system compatibility and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the frequency of the clock signal is increased to adapt to high data volume, then the data transmission capacity is improved, but the power consumption increases and the slave circuits may not operate normally
Solution Approach 1:
The patent segments the control data into two parts: main control data transmitted through the data line and additional control data transmitted through the clock line. This segmentation allows the system to transmit more control information without increasing the clock frequency, thereby maintaining power consumption at acceptable levels while improving data transmission capacity.
Solution Approach 2:
The patent makes the clock line serve a dual function: it continues to provide clock signals for timing while also transmitting additional control data. This multi-functionality allows the system to increase data transmission capacity without adding new dedicated data lines or increasing clock frequency, thus avoiding increased power consumption.
2Productivity
If the frequency of the clock signal is increased to adapt to high data volume, then the data transmission capacity is improved, but the slave circuits may not operate normally
Solution Approach 1:
By segmenting control data into main control data (on data line) and additional control data (on clock line), the system can transmit more information without increasing clock frequency, ensuring slave circuits operate within their reliable frequency range while still achieving high data transmission capacity.
Solution Approach 2:
The patent uses the clock line as an intermediary to transmit additional control data. This approach allows the system to expand data transmission capacity without overloading the slave circuits with excessively high clock frequencies, maintaining reliable operation.
3Productivity
If slave circuits are fully updated to handle high data volume and high frequency, then the data transmission capacity is improved, but the repair cost increases
Solution Approach 1:
The segmentation of control data allows existing slave circuits to handle high data volume requirements without requiring full updates. The main control data is transmitted through the data line as before, while additional control data is transmitted through the clock line, enabling backward compatibility and reducing repair costs.
Solution Approach 2:
By making the clock line multi-functional (carrying both clock signals and additional control data), the patent allows existing slave circuits to operate at their original frequency capabilities while still receiving sufficient control information, avoiding the need for expensive hardware updates.
4Productivity
If slave circuits are fully updated to handle high data volume and high frequency, then the data transmission capacity is improved, but the design time increases
Solution Approach 1:
The patent segments control data transmission across two channels (data line and clock line), allowing existing slave circuits to meet high data volume requirements without redesign. This approach significantly reduces design time compared to fully updating slave circuits.
Solution Approach 2:
By enabling the clock line to serve dual purposes (timing and data transmission), the patent allows existing slave circuit designs to be used as-is, minimizing design time while achieving high data transmission capacity.
5Productivity
If a slave circuit with high data volume is used to meet high data volume requirements, then the data transmission capacity is improved, but the system compatibility decreases due to different data volume requirements
Solution Approach 1:
The patent segments control data into main control data and additional control data, transmitted through different channels. This allows slave circuits with different data volume capabilities to operate correctly by receiving only the necessary portion of control data, maintaining system compatibility while supporting high data transmission capacity.
Solution Approach 2:
By making the clock line multi-functional for transmitting additional control data, the patent creates a universal interface that accommodates slave circuits with varying data volume requirements, improving system compatibility while enabling high data transmission capacity.
Data Source
AI summary
A signal interface system and a data transmission method thereof are provided. The signal interface system includes a data line, a clock line, a master circuit, and at least one slave circuit. The master circuit has a main data pin coupled to the data line and a main clock pin coupled to the clock line. The at least one slave circuit has a secondary data pin coupled to the data line and a secondary clock pin coupled to the clock line. The master circuit transmits a main control data to the at least one slave circuit through the data line, and transmits an additional control data to the at least one slave circuit through the clock line.