Clock Frequency Ratio Monitoring With Dual Counters and IIR Tracking
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Solution Overview
Problem
Modern electronic devices face performance issues due to inaccuracies in clock signal frequencies, which can affect communication and system operations, especially as data speeds reach multi-giga bit per second ranges, and existing solutions struggle to provide high-precision clock frequency monitoring and tracking.
Innovation Solution
A device comprising a first counter for the reference clock signal, a second counter for the sample clock signal, and a circuit to determine the ratio of their frequencies using an infinite impulse response filter and a calculator to process difference values over time, allowing for high-precision clock frequency calculation without requiring prior knowledge of the frequency ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional clock frequency monitoring methods are used, then device complexity is reduced, but measurement precision deteriorates due to inability to achieve high-precision clock frequency calculation and tracking
Solution Approach 1:
The system segments the frequency measurement task into multiple counter units (first counter for reference clock, second counter for sample clock) that each handle specific counting functions. This segmentation allows parallel operation of counters and enables high-precision frequency ratio measurement through coordinated counting operations without requiring a single complex measurement device.
Solution Approach 2:
The patent introduces an intermediary processing circuit that receives outputs from multiple counters and calculates the frequency ratio through coordinated processing. This intermediary circuit acts as a mediator between the reference clock counter and sample clock counter, enabling precise frequency measurement without direct complex interaction between the clock sources themselves.
2Measurement precision
If high-precision frequency tracking is implemented, then measurement precision improves, but loss of time increases due to multiple sampling and calculation operations
Solution Approach 1:
The system performs preliminary counting actions by having the first and second counters continuously accumulate clock cycles in parallel before the final ratio calculation. This preliminary parallel counting allows the frequency measurement to be based on accumulated data over multiple cycles, improving precision without requiring sequential measurement operations that would consume more time.
Solution Approach 2:
The counters operate continuously to accumulate clock cycle counts, maintaining continuous useful action in the measurement process. The first counter continuously counts reference clock cycles while the second counter continuously counts sample clock cycles, ensuring that measurement data is constantly being gathered without interruption, thus improving precision efficiently over time.
3Adaptability or versatility
If adaptive frequency monitoring is implemented, then adaptability improves, but device complexity increases due to dynamic parameter adjustment circuits
Solution Approach 1:
The system implements dynamic adaptability by allowing the second counter to be configured with different counting modes (e.g., counting sample clock cycles within each reference clock period, or counting over multiple reference clock periods). This dynamic configuration capability enables the monitoring system to adapt to different frequency ratios and measurement requirements without requiring completely different hardware architectures.
Solution Approach 2:
The counting circuit is designed with universal functionality to handle multiple measurement scenarios. The same basic counter and processing circuitry can measure different frequency ratios, support different sampling strategies, and adapt to various clock signal characteristics, making the system versatile without proportionally increasing complexity.
Data Source
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AI summary
Systems and methods relate a device for monitoring or tracking clock frequency. The device can include a first circuit configured to receive a reference clock signal and provide a first signal in response to a first number of cycles of the reference clock signal, and a second circuit configured to receive a sample clock signal and provide a second signal in response to the first signal. The second signal is indicative of a second number of cycles of the sample clock signal occurring during the first number of cycles of the reference clock signal. The device can also include a third circuit configured to determine a ratio of a first frequency of the reference clock signal to a second frequency of the sample signal using the second signal.