Clock Skew Measurement Circuitry for Programmable Clock Trees
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Solution Overview
Problem
Existing methods for determining clock skew in programmable IC devices are inadequate, as they fail to accurately measure changes in skew due to alterations in the programmable clock network and often rely on unadaptable balanced clock trees, leading to degraded IC performance.
Innovation Solution
Incorporation of clock skew measurement circuitry positioned between clock tree leafs within the IC device to determine skew between leaf clock signals, using phase difference analysis to generate an error signal for adjusting clock parameters and mitigating skew.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a balanced clock tree design is used during the design process, then skew is mitigated, but the design becomes unadaptable when the clock tree changes in programmable IC devices
Solution Approach 1:
The patent implements preliminary skew calibration by measuring actual skew values in the programmable IC device and storing these measurements in lookup tables. This preliminary action allows the system to quickly compensate for skew variations later without recalibrating the entire clock tree, thus maintaining adaptability while ensuring reliable skew mitigation.
Solution Approach 2:
The patent changes the parameter being measured from theoretical clock tree design parameters to actual skew values observed in the programmable device. By measuring real skew between clock signals at different locations and using these measurements to adjust timing parameters, the system adapts to actual device characteristics and clock tree configurations.
2Ease of operation
If a programmable circuit is used to determine skew, then the measurement can be performed internally, but the parameters and location limitations reduce measurement accuracy
Solution Approach 1:
The patent introduces delay elements as intermediary components between the clock signals and the measurement circuitry. These delay elements allow for precise timing adjustments and enable the measurement of skew with higher resolution than would be possible with direct connection, thereby improving measurement accuracy while maintaining internal measurement capability.
Solution Approach 2:
The patent segments the skew measurement function into multiple independent measurement circuits, each capable of measuring skew between specific clock signals. This segmentation allows for more precise local measurements and enables the system to aggregate multiple measurements to determine overall skew characteristics with higher accuracy.
3Reliability
If skew is overestimated during the design process, then performance degradation is avoided, but actual IC device performance is degraded due to excessive conservatism
Solution Approach 1:
The patent implements feedback by measuring actual skew values in the programmable IC device and using these measurements to adjust timing parameters and lookup tables. This feedback loop replaces conservative overestimation with accurate measured values, allowing the system to optimize performance based on real device characteristics rather than theoretical worst-case scenarios.
Data Source
AI summary
Clock skew measurement circuitry determines skew between clock signals within an integrated circuit (IC) device or between multiple IC devices. An IC device includes clock tree circuitry and the clock skew measurement circuitry. The clock tree circuitry provides a first clock signal and a second clock signal to components of the IC device. The clock skew measurement circuitry is connected to the clock tree circuitry. The clock skew measurement circuitry generates and outputs an error signal based on a phase difference between the first clock signal and the second clock signal.