Variable-Length Clock Stretcher for Jitter Reduction Without Clean Power
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Solution Overview
Problem
Conventional clock stretchers require a clean power supply and struggle with glitches due to finite DLL bandwidth and phase detector offset, leading to timing violations and functional failures in systems with variable load conditions.
Innovation Solution
A clock stretcher module that senses supply voltage changes and adjusts the clock frequency by using a digital DLL with a control unit and combiner to generate a modified clock signal, incorporating an end-of-chain detector and bypass mechanism to compensate for glitches and operate without intervening voltage regulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a digital DLL is used to operate without a clean power supply, then the requirement for a clean power supply is reduced, but jitter increases
Solution Approach 1:
The patent applies preliminary action by detecting the end-of-chain condition in advance before it causes timing violations. The EOC detector monitors the delay line and generates a signal when the delayed clock edge approaches the output, allowing the system to proactively adjust or bypass the delay line before jitter accumulates to harmful levels, thus maintaining reliability while operating without a clean power supply
2Adaptability or versatility
If the delay line delay is increased to extend clock frequency range, then the clock frequency range is extended, but timing violations may occur due to excessive delay
Solution Approach 1:
The patent implements feedback through the end-of-chain detector that continuously monitors the delay line output and provides feedback signals to the control logic. When the delayed clock edge approaches the output (end-of-chain condition), the feedback triggers a bypass or adjustment, preventing the excessive delay from causing timing violations while still allowing the delay line to extend the clock frequency range under normal conditions
3Stability of the object's composition
If the DLL bandwidth is limited to ensure stability, then stability is improved, but the DLL cannot keep up with fast supply voltage changes
Solution Approach 1:
The patent introduces an intermediary mechanism - the end-of-chain detector - that acts as a mediator between the slow DLL and the fast-varying supply voltage conditions. The EOC detector operates independently of the DLL bandwidth limitations and provides early warning signals when delay line output approaches the output, enabling the system to respond to supply voltage changes without being constrained by the limited DLL bandwidth
Data Source
AI summary
A clock stretcher includes a DLL that derives delayed versions of an input clock signal. The clock stretcher has passive and stretching modes. It operates from a sensed power supply without intervening voltage regulation.In passive mode, it forwards input clock pulses to the clock stretcher output. The input clock pulses are delayed by fewer than 10 DLL delay line delay stages. In stretching mode, a combiner cyclically selects the delayed versions of the input clock signal to generate a modified clock signal. The combiner uses a hop code, dependent on a sensed condition, to determine the step size for the cyclical selection.To enter passive mode, the clock stretcher tests if a passive mode entry threshold is met. The threshold includes two conditions: the hop code must be zero, and phase selection must have reached a wraparound point that may have been corrected for a delay line offset.