Clock Synchronization Monitoring for SoC Voltage Glitch Detection
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Solution Overview
Problem
Existing systems on chip (SoCs) are costly and vulnerable to fault attacks like voltage glitch injections, with existing detection methods increasing silicon overhead and being susceptible to tampering, while many devices lack effective protection.
Innovation Solution
Utilize the existing clock synchronization circuitry, such as Delay Locked Loops (DLLs) or Phase Locked Loops (PLLs), to monitor on-chip voltage fluctuations and detect voltage glitches by comparing clock synchronization signals to thresholds, with software or hardware detectors to identify abnormal signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated hardware circuitry (sensor + detector) is implemented to detect voltage glitch attacks, then detection capability is improved, but silicon overhead and cost increase
Solution Approach 1:
The clock synchronization circuitry is designed to perform its primary function of synchronizing data transfer while simultaneously serving as a voltage glitch detection mechanism. The circuit monitors its own operational parameters (phase difference, delay values) to detect attacks, eliminating the need for separate dedicated detection hardware and reducing silicon overhead.
Solution Approach 2:
The clock synchronization circuitry monitors its own operational state to detect voltage glitch attacks. By observing changes in its own phase difference and delay parameters, the circuit performs self-diagnosis without requiring external dedicated sensors or detectors, thereby reducing hardware complexity while maintaining detection capability.
2Reliability
If dedicated hardware circuitry is implemented for glitch detection, then detection reliability is improved, but the circuitry can be maliciously muted and cannot be added after manufacturing
Solution Approach 1:
The clock synchronization circuitry serves dual purposes: synchronizing data transfer and detecting voltage glitch attacks. Since this circuit is already present in modern SoC devices for memory interface synchronization, the detection capability is inherently available without requiring additional hardware to be added post-manufacturing, thus improving adaptability while maintaining detection reliability.
3Device complexity
If existing clock synchronization circuitry is used for detection, then cost is reduced and post-manufacturing deployment is enabled, but detection precision may be impacted
Solution Approach 1:
The system continuously monitors the phase difference and delay parameters of the clock synchronization circuitry and compares them against expected ranges. When deviations indicate a voltage glitch attack, the system responds by adjusting timing parameters or triggering security responses. This feedback mechanism enables precise detection using existing circuitry without requiring additional hardware.
Data Source
Figure 1
Figure 2~3
AI summary
The invention relates to a system on chip (10, 20) comprising a memory controller (13, 23) having a clock synchronization circuitry based on a locked loop (16, 26). The system on chip further comprises a voltage glitch attack detector (17, 27) configured to monitor a clock synchronization signal generated by the clock synchronization circuitry and check whether the monitored clock synchronization signal is a nominal signal or a signal characteristic of a voltage glitch attack. The voltage glitch attack detector may be a software detector executed by a processing unit.